Suggestions/Recommendations with CPLD's and Software

[Henry]

I'm looking for some suggestions/recommendations with CPLD's and development
software.



I'm new to CPLD's and a couple projects of mine will involve redesigning
existing "though hole" hardware using a CPLD. I've researching some Xilinx
products, and believe the 9500 series will do everything I need, as my needs
really aren't that great. My only issue with the ISE software is I need to
recreate all the TTL IC logic from scratch, which will prove to be very time
consuming. I was hoping to find a design package that would already have
existing "groups" of TTL logic designed so I won't have to take as much time
with the schematic design and layout. For example in ISE it took me about
15 minutes just to draw the logic to a 74LS245. Only took me 3 minutes to
"wire" it up.



Any recommendations on other companies, other software and your experiences
with them would be appreciated.



Thanks for your time.





Henry

GSE-Reactive.com

My email is listed on the site if you wish to contact me directly.

 

[gabor]

Henry wrote:

I'm looking for some suggestions/recommendations with CPLD's and development
software.



I'm new to CPLD's and a couple projects of mine will involve redesigning
existing "though hole" hardware using a CPLD. I've researching some Xilinx
products, and believe the 9500 series will do everything I need, as my needs
really aren't that great. My only issue with the ISE software is I need to
recreate all the TTL IC logic from scratch, which will prove to be very time
consuming. I was hoping to find a design package that would already have
existing "groups" of TTL logic designed so I won't have to take as much time
with the schematic design and layout. For example in ISE it took me about
15 minutes just to draw the logic to a 74LS245. Only took me 3 minutes to
"wire" it up.



Any recommendations on other companies, other software and your experiences
with them would be appreciated.



Thanks for your time.





Henry

GSE-Reactive.com

My email is listed on the site if you wish to contact me directly.

ISE has very bad schematic entry. If you can find a copy of the
no-longer
supported Aldec-based Foundation tools (4.1i is what I use), there is a
much better schematic editor and the libraries contain many TTL
macros with library names like X74_160 for a decade counter. On the
other hand if you want to move into the modern era of design you're
better off with Verilog or VHDL. Then you won't go through this again
in a few more years...

Regards,
Gabor

 

Henry wrote:

I'm looking for some suggestions/recommendations with CPLD's and development
software.



I'm new to CPLD's and a couple projects of mine will involve redesigning
existing "though hole" hardware using a CPLD. I've researching some Xilinx
products, and believe the 9500 series will do everything I need, as my needs
really aren't that great. My only issue with the ISE software is I need to
recreate all the TTL IC logic from scratch, which will prove to be very time
consuming. I was hoping to find a design package that would already have
existing "groups" of TTL logic designed so I won't have to take as much time
with the schematic design and layout. For example in ISE it took me about
15 minutes just to draw the logic to a 74LS245. Only took me 3 minutes to
"wire" it up.



Any recommendations on other companies, other software and your experiences
with them would be appreciated.



Thanks for your time.





Henry

GSE-Reactive.com

My email is listed on the site if you wish to contact me directly.

Like what others has pointed out, you need a better schematic entry
tool. Sure, the Aldec-sourced Xilinx Foundation is much better but it
has been discountinued. I would suggest that you try out Aldec's
Active-HDL. It has schematic entry as well as HDL entry. The schematic
entry tool is now called Block Diagram Editor (BDE) and it is enhanced
from the old schematic tool in the Xilinx Foundation tool set.

You can easily use the BDE for schematic entry - all different FPGA
vendor primitive libraries are provided including the 9500 CPLD from
Xilinx. What is more, it is a very good tool to transit from schematic
based design to HDL based design as it generates HDL code from
schmetic. As as result, you can either generate EDIF from schematic
(traditional schematic design methodology) or you can migrate in to a
HDL baded design by way of HDL generation from BDE.

That being said, I do not think Xilinx provide 74 series TTL logic
cells for you in their primitive libraries. They do provided gates,
flip-flops, shifters, counters, memories etc for you to build a
system/design.