Struct in C to verilog

[Tia]

Hi !
Anyone knows the logic about how to convert the Struct in C to verilog?
The data sturcture has 100s of variables.So I can't declare them
separately in memory.Any suggestions would be helpful.
Thanks in advance
Tia

 

[General Schvantzkoph]

On Fri, 18 Feb 2005 20:56:23 -0800, Tia wrote:

Hi !
Anyone knows the logic about how to convert the Struct in C to verilog?
The data sturcture has 100s of variables.So I can't declare them
separately in memory.Any suggestions would be helpful.
Thanks in advance
Tia

Verilog doesn't have structs, it's the single greatest deficiency in the
language. System Verilog will have structs and unions but that doesn't
help you today.

 

[tom]

Try Confluence. It has lists, records (structs), and hash tables. If
you don't see a datatype you like, simply create your own.

More power than SystemVerilog, and it available today; for free!

Confluence record:

my_record = (a:1 b:2 c:3)

http://www.confluent.org/

-Tom

It has more data structures than System Verilog

 

[Swapnajit Mittra]

Few notes:

1. I am not sure which simulator Tia is using, but Modelsim 6.x, VCS
7.2 and, even Aldec Riviera now supports SystemVerilog today. All other
simulators do the same in varying degree.

2. Apart from the language issue, I would take a second look into my
micro-architecture, if a record (i.e. a structure) has 100s of fields.
Perhaps, you can use only one or two sets of variables representing the
fields and then re-use them for various records at different points of
time.

- Swapnajit.
--
SystemVerilog, DPI, Verilog PLI and all other good stuffs.
Project VeriPage: http://www.project-veripage.com
For subscribing to the mailing list:
<URL: http://www.project-veripage.com/list/?p=subscribe&id=1>

 

[Jason Zheng]

General Schvantzkoph wrote:

On Fri, 18 Feb 2005 20:56:23 -0800, Tia wrote:


Hi !
Anyone knows the logic about how to convert the Struct in C to verilog?
The data sturcture has 100s of variables.So I can't declare them
separately in memory.Any suggestions would be helpful.
Thanks in advance
Tia


Verilog doesn't have structs, it's the single greatest deficiency in the
language. System Verilog will have structs and unions but that doesn't
help you today.
One could write an elborate python/perl script to scan your original c

code and spit out the apporpriate registers in verilog. You would need
to come up with your variable naming scheme, such as replacing "." with
"_". It's not the cleanest way to do things, but it will save you a LOT
of trouble.

-jz

 

Tia wrote:

Anyone knows the logic about how to convert the Struct in C to
verilog?
The data sturcture has 100s of variables.So I can't declare them
separately in memory.

One approach I have seen used is to declare a module to represent the
struct data type. The module contains variables for the fields in
the struct. To declare a variable of the struct type, you declare it
as an instance of the module. Then you can access fields of the struct
with hierarchical references, which look exactly like a struct
reference.
For example,

module mystruct; // module representing struct
integer a;
integer b;
endmodule

module design;
mystruct m1(); // struct variable m1
mystruct m2(); // struct variable m2

initial
begin
m1.a = 0; // set field a of struct m1 to 0
m1.b = m1.a;
m2.a = m1.a + m1.b;
end

endmodule


There are some issues with this. Even an empty module
will take up significant amounts of memory. For a small
struct, the memory usage will be very high compared to
a real struct. For a large struct, the extra overhead
won't be as significant, but there will still be some
impact.

Synthesis tools generally don't allow hierarchical
references, so this won't synthesize.

You can't do operations on the entire "struct", such
as assigning it, attaching it to a port, passing it
to a task, etc.

The only advantage this has over declaring a group
of independent variables to represent the struct,
is that you can easily declare multiple instances
of the "struct".

Without pointers (or some equivalent), structs are just
a convenience feature. Anything that can be done with
a struct can be done without it. If you have structs,
pointers and dynamic memory allocation, together, then
you have capabilities that cannot be gotten without them.

 

[tom]

sharp@cadence.com wrote:

Tia wrote:
Anyone knows the logic about how to convert the Struct in C to
verilog?
The data sturcture has 100s of variables.So I can't declare them
separately in memory.

One approach I have seen used is to declare a module to represent the
struct data type. The module contains variables for the fields in
the struct. To declare a variable of the struct type, you declare it
as an instance of the module. Then you can access fields of the
struct
with hierarchical references, which look exactly like a struct
reference.

[snip]

You can do the same thing with Confluence components (aka modules).
Actually, a component instance's ports are nothing more than a record.

[snip]

There are some issues with this. Even an empty module
will take up significant amounts of memory. For a small
struct, the memory usage will be very high compared to
a real struct. For a large struct, the extra overhead
won't be as significant, but there will still be some
impact.

Confluence does not have this limitation, as the compiler
elaborates all data structures (records, lists, components,
instances, etc.) resulting in a single Verilog netlist.

Synthesis tools generally don't allow hierarchical
references, so this won't synthesize.

Because the Confluence compiler translates the data structures
into the netlist, synthesis is a guaranteed.

You can't do operations on the entire "struct", such
as assigning it, attaching it to a port, passing it
to a task, etc.

Again, Confluence does not have these restrictions.
All data types are first class -- they can be input and output
from component instances. Components and instances themselves
are first class. That would be like defining a module,
then sending that module through the input of another. Try
that with Verilog.

The only advantage this has over declaring a group
of independent variables to represent the struct,
is that you can easily declare multiple instances
of the "struct".

This is a big advantage, and is one example of data abstraction.
Maybe it's not a big deal if you are only grouping a few
variables, but when you start needing "records-of-records",
it's time to start looking for a higher-level language.

-Tom