R
rik
Guest
Hi
I was having an issue with strings in verilog. I have a JTAG state
machine and a testbench running it. I am moving through different JTAG
states which are referenced by 4bit binary # as
TlR = 4'b0000
RTI = 4'b0001
............
...........
In my rtl I had something like,
reg[4:0] pres_state;
`define TLR 4'b0000
`define RTI 4'b0001
.........
reg[4:0] pres_state;
reg[4:0] next_state;
always@ (posedge tclk)
.......
pres_state <= next_state;
When I simulate it, and see the waves on the waveform window its gets
really difficult to decode the states by looking at numbers, so I was
thinking whether I can use characters to represent different JTAG
states.
I had something like this,
reg [3*8:0] pres_state;
But I found ascii values of different states represented on the
waveform. Do you guys know the reason. So how can I represent strings
in stead of numbers?
I know I can use $display but I want my strings to appear inside my
waveforms.
Thanks
Rik
I was having an issue with strings in verilog. I have a JTAG state
machine and a testbench running it. I am moving through different JTAG
states which are referenced by 4bit binary # as
TlR = 4'b0000
RTI = 4'b0001
............
...........
In my rtl I had something like,
reg[4:0] pres_state;
`define TLR 4'b0000
`define RTI 4'b0001
.........
reg[4:0] pres_state;
reg[4:0] next_state;
always@ (posedge tclk)
.......
pres_state <= next_state;
When I simulate it, and see the waves on the waveform window its gets
really difficult to decode the states by looking at numbers, so I was
thinking whether I can use characters to represent different JTAG
states.
I had something like this,
reg [3*8:0] pres_state;
But I found ascii values of different states represented on the
waveform. Do you guys know the reason. So how can I represent strings
in stead of numbers?
I know I can use $display but I want my strings to appear inside my
waveforms.
Thanks
Rik