Stratix FPGA configuration issues

[Vadim Bishtein]

I am having trouble downloading my own VHDL code onto the
Stratix device through ByteBlaster. The device is housed on the
NIOS Board-Stratix Edition from Altera. Download process goes
normally, but when it is finished the on-board MAX CPLD loads
the Stratix with the default NIOS code from the FLASH. In the manual
Altera says that Stratix will be configured to the VHDL code if it is
programmed
through ByteBlaster cable. It doesn't work !

Anyone has any ideas ???

(the Stratix device is EP1S10 ES)

Even Altera support had no clue....

thanks,

 

[Rene Tschaggelar]

Vadim Bishtein wrote:

I am having trouble downloading my own VHDL code onto the
Stratix device through ByteBlaster. The device is housed on the
NIOS Board-Stratix Edition from Altera. Download process goes
normally, but when it is finished the on-board MAX CPLD loads
the Stratix with the default NIOS code from the FLASH. In the manual
Altera says that Stratix will be configured to the VHDL code if it is
programmed
through ByteBlaster cable. It doesn't work !

Anyone has any ideas ???

(the Stratix device is EP1S10 ES)

Even Altera support had no clue....

Try the newsgroup 'comp.arch.fpga'

Rene
--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
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