strange problem with RTL

[salimbaba]

hi,
i am using spartan 3 xc3s4000 in my design and i have two gigabit etherne
interfaces integrated to it. I connect one interface to one pc and th
other one to 2nd pc , all works fine. Pings going, packets going.
When i insert two cisco switches configured on VLAN in the scenario i.e.
pc<-> switch <-> FPGA <-> switch <-> pc ;

my packets start dropping. I don't know why as i am only performing stor
and forward. If it is working without switches, it should work wit
switches as well.

Can anyone give me any pointers ?

Thanks


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[Jan Pech]

On Wed, 2011-01-26 at 06:12 -0600, salimbaba wrote:

hi,
i am using spartan 3 xc3s4000 in my design and i have two gigabit ethernet
interfaces integrated to it. I connect one interface to one pc and the
other one to 2nd pc , all works fine. Pings going, packets going.
When i insert two cisco switches configured on VLAN in the scenario i.e.
pc<-> switch <-> FPGA <-> switch <-> pc ;

my packets start dropping. I don't know why as i am only performing store
and forward. If it is working without switches, it should work with
switches as well.

Can anyone give me any pointers ?

Thanks


---------------------------------------
Posted through http://www.FPGARelated.com

What does the "gigabit ethernet interface" mean? Did you connect
directly the GMII/RGMII/SGMII interfaces of external PHYs or do you use
some MACs?

If you use Ethernet MACs, do not forget to enable the VLAN support
otherwise they probably drop VLAN tagged Ethernet frames.

Jan

 

[salimbaba]

What does the "gigabit ethernet interface" mean? Did you connect
directly the GMII/RGMII/SGMII interfaces of external PHYs or do you use
some MACs?

If you use Ethernet MACs, do not forget to enable the VLAN support
otherwise they probably drop VLAN tagged Ethernet frames.

Jan

hey Jan,
well i have PHYs connected with FPGA through GMII interface, and i hav
MACs in FPGA. I am only forwarding the packet, without even looking at it
so even if it has a VLAN header, it should be forwarded.Secondly, I looke
at the packet using chipscope, there wasn't any VLAN header, which i cam
to know that if we are only using one VLAN on one TRUNK line, it doesn'
attach VLAN header.

Anyway,i further looked at the packet and well my counter is not resettin
:s .. It resets to a random value instead of 0. I have no idea why.

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[vanepp]

hi,
i am using spartan 3 xc3s4000 in my design and i have two gigabi
ethernet
interfaces integrated to it. I connect one interface to one pc and the
other one to 2nd pc , all works fine. Pings going, packets going.
When i insert two cisco switches configured on VLAN in the scenario i.e.
pc<-> switch <-> FPGA <-> switch <-> pc ;

my packets start dropping. I don't know why as i am only performing store
and forward. If it is working without switches, it should work with
switches as well.

Can anyone give me any pointers ?

Thanks

First replace the FPGA in this chain with a Cat5 crossover cabl
(i.e.
remove the FPGA from the circuit and replace it with the cable (between th
two switches) and see if the packet loss still occurs. If yes, you need t
talk to the switch maintainer(s) to fix their switch (possibly allocatin
more buffer space to your ports) and/or check the network settings on th
PCs to make sure they match the settings on the switch (usually auto). I
the loss doesn't occur then you are sure your board is the problem. Nex
thing to check is the PHY and switch port configurations. Likely the switc
ports are in auto which means your boards PHYs need to be set to auto. I
the switches are set auto and your board is (of instance) manual 100 ful
duplex (i.e. autonegotiation is disabled) then this can happen as th
switches may choose half duplex (they usually get the speed right) whic
will cause the packet loss you are seeing. Another good thing to try is as
the switch owner to check what the ports to the FPGA have negotiated wit
the FPGA board in place. That should match what the PHY on your FPGA is se
for or has negotiated (although unless the PHY has status lights it may b
difficult to determine what it has negotiated). In short I think this i
more likely a network configuration problem than an FPGA one.
One last thought, check the settings on the network cards of the two PCs a
well, since they could be set to manual instead of auto (especially if you
board is also set to manual) and work but break when the switches ar
added.

Peter Van Epp

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[salimbaba]

First replace the FPGA in this chain with a Cat5 crossover cable
(i.e.
remove the FPGA from the circuit and replace it with the cable (betwee
the
two switches) and see if the packet loss still occurs. If yes, you nee
to
talk to the switch maintainer(s) to fix their switch (possibly allocating
more buffer space to your ports) and/or check the network settings on the
PCs to make sure they match the settings on the switch (usually auto). If
the loss doesn't occur then you are sure your board is the problem. Next
thing to check is the PHY and switch port configurations. Likely th
switch
ports are in auto which means your boards PHYs need to be set to auto. If
the switches are set auto and your board is (of instance) manual 100 full
duplex (i.e. autonegotiation is disabled) then this can happen as the
switches may choose half duplex (they usually get the speed right) which
will cause the packet loss you are seeing. Another good thing to try i
ask
the switch owner to check what the ports to the FPGA have negotiated with
the FPGA board in place. That should match what the PHY on your FPGA i
set
for or has negotiated (although unless the PHY has status lights it ma
be
difficult to determine what it has negotiated). In short I think this is
more likely a network configuration problem than an FPGA one.
One last thought, check the settings on the network cards of the two PC
as
well, since they could be set to manual instead of auto (especially i
your
board is also set to manual) and work but break when the switches are
added.

Peter Van Epp

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ok i think i have diagnosed the problem to some extent. I captured th
packets on chipscope and what i saw was a little surprising at least fo
me. My rx_data_valid signal coming from PHY was not going low, rather i
stayed high. When i googled the gigabit ethernet specs, i came to kno
about this thing they call " frame burst". In this mode, the transmitte
doesn't relinquish the line and keeps on sending some frames back to back
Which makes sense with the thing i am facing i.e. rx_data_valid not goin
low, which in turn doesn't make my state machines change states, counter
not resetting and packets dropping. I maybe wrong, but this is what i hav
concluded. Any hints would be highly appreciated on this issue.

Thanks


with warm regards


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