strange effect with tristate output

[Frank Buss]

I'm using a XC95144XL, two pins are an input for a 5V signal, which have
pullup resistors (3k3). Setting the pins to low from my VHDL design
works great. Then I thought I could set it to high, too, to avoid the
latency of the pullup resistor. But as soon as I switch it back to input
(pin <= 'Z'), the voltage drops again, as if it switches to some capacitor:

http://i.imgur.com/EYV05oS.png

and only then the pullup resistor starts charging the parasitic
capacitance. I don't understand this behaviour, because the parasitic
capacitance should be already charged when switching.

Maybe something different is wrong in my circuit, I'll try to implement
some independant test case, but maybe someone knows already what is
going on or how I could fix it.

--
Frank Buss, http://www.frank-buss.de
C64 MIDI interface, preorder: http://www.frank-buss.de/c64/midi/buy.html

 

[Hal Murray]

In article <ls0dck$v9p$1@newsreader4.netcologne.de>,
Frank Buss <fb@frank-buss.de> writes:

I'm using a XC95144XL, two pins are an input for a 5V signal, which have
pullup resistors (3k3). Setting the pins to low from my VHDL design
works great. Then I thought I could set it to high, too, to avoid the
latency of the pullup resistor. But as soon as I switch it back to input
(pin <= 'Z'), the voltage drops again, as if it switches to some capacitor:

http://i.imgur.com/EYV05oS.png

and only then the pullup resistor starts charging the parasitic
capacitance. I don't understand this behaviour, because the parasitic
capacitance should be already charged when switching.

Maybe something different is wrong in my circuit, I'll try to implement
some independant test case, but maybe someone knows already what is
going on or how I could fix it.

My guess is that you are setting the output to low in the same cycle
that you disable the output driver. That leaves a race between turning
off before, during, or after the output has switched to low. It looks
like it was during, the output has switched halfway to low.

--
These are my opinions. I hate spam.

 

[Jon Elson]

Frank Buss wrote:

> I'm using a XC95144XL, two pins are an input for a 5V signal,

9500XL is a 3.3 V logic family that is safe for 5 V signal levels,
if series resistance is provided, but it will not drive 5V to
an output. So, don't expect anything to work right with 5V pull-ups
to an output.

The 5 V tolerance is there only for connection of INPUTS to other
circuitry. Anyway, it looks like the pull-up and pull-down transistors
don't get cleanly off the pad when you tell it to go to Hi-Z.

Jon

 

[Frank Buss]

Jon Elson wrote:

9500XL is a 3.3 V logic family that is safe for 5 V signal levels,
if series resistance is provided, but it will not drive 5V to
an output. So, don't expect anything to work right with 5V pull-ups
to an output.

Where did you read that it needs a series resistor? The famlily data
sheet says on page 12:

| The I/Os on each XC9500XL device are fully 5V tolerant
| even though the core power supply is 3.3 volts. This allows
| 5V CMOS signals to connect directly to the XC9500XL
| inputs without damage.

And I think it is safe to drive it as output with the pullup resistor.
The 3k3 pullup allows a current of max 1.5 mA for the 5V, which should
not cause any over voltage at the pin in output mode.

The 5 V tolerance is there only for connection of INPUTS to other
circuitry. Anyway, it looks like the pull-up and pull-down
transistors don't get cleanly off the pad when you tell it to go to
Hi-Z.

I changed the output slew rate from slow to fast and increased the main
clock frequency in the UCF file (someday I'll learn the timing analyzer
and how to setup proper timing constraints), now it looks like this:

http://i.imgur.com/xtfL72j.png

Not perfect, but should work for my project.

--
Frank Buss, http://www.frank-buss.de
C64 MIDI interface, preorder: http://www.frank-buss.de/c64/midi/buy.html

 

[Gabor]

On 8/7/2014 5:35 PM, Frank Buss wrote:

Jon Elson wrote:

9500XL is a 3.3 V logic family that is safe for 5 V signal levels,
if series resistance is provided, but it will not drive 5V to
an output. So, don't expect anything to work right with 5V pull-ups
to an output.

Where did you read that it needs a series resistor? The famlily data
sheet says on page 12:

| The I/Os on each XC9500XL device are fully 5V tolerant
| even though the core power supply is 3.3 volts. This allows
| 5V CMOS signals to connect directly to the XC9500XL
| inputs without damage.

And I think it is safe to drive it as output with the pullup resistor.
The 3k3 pullup allows a current of max 1.5 mA for the 5V, which should
not cause any over voltage at the pin in output mode.

The 5 V tolerance is there only for connection of INPUTS to other
circuitry. Anyway, it looks like the pull-up and pull-down
transistors don't get cleanly off the pad when you tell it to go to
Hi-Z.

I changed the output slew rate from slow to fast and increased the main
clock frequency in the UCF file (someday I'll learn the timing analyzer
and how to setup proper timing constraints), now it looks like this:

http://i.imgur.com/xtfL72j.png

Not perfect, but should work for my project.

The effect of changing the slew rate seems to confirm the
suspicion that the output switches low at the same time the
tristate happens. Can you look at the fitter output to see
if this is the case (look at the generated equations)?

--
Gabor