strange DAC...

[server]

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.



--

I yam what I yam - Popeye

 

[Lasse Langwadt Christensen]

lørdag den 18. december 2021 kl. 03.49.47 UTC+1 skrev jla...@highlandsniptechnology.com:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

it is basically a FIR filter, so it\'s just an extra filter before your filter

if you are going to add a FF anyway why not 8, like 74hc164

 

[Chris Jones]

On 18/12/2021 13:49, jlarkin@highlandsniptechnology.com wrote:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

Probably not much advantage to it.

You might need slightly less filtering after it, but that isn\'t likely
to save you much.

With all of the resistors the same value (since you labelled them all R)
you will only get 5 levels, not 16, since there will be 0,1,2,3 or 4
flipflops high.

If you have a longer chain of flipflops (or even just for 4 of them),
you would be better off not weighting them all the same, but weight the
conductance (1/R) as raised cosine or gaussian or something that will
filter better than a flat-top impulse response.

 

[server]

On Fri, 17 Dec 2021 19:09:32 -0800 (PST), Lasse Langwadt Christensen
<langwadt@fonz.dk> wrote:

lørdag den 18. december 2021 kl. 03.49.47 UTC+1 skrev jla...@highlandsniptechnology.com:
I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.


it is basically a FIR filter, so it\'s just an extra filter before your filter

if you are going to add a FF anyway why not 8, like 74hc164

Oh, of course; that was hiding behind two layers of fetticcini with
Mo\'s cherry-tomato vodka sauce. The resistors would be sized for some
filter response.



--

I yam what I yam - Popeye

 

[server]

On Sat, 18 Dec 2021 23:24:42 +1100, Chris Jones
<lugnut808@spam.yahoo.com> wrote:

On 18/12/2021 13:49, jlarkin@highlandsniptechnology.com wrote:
I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

Probably not much advantage to it.

You might need slightly less filtering after it, but that isn\'t likely
to save you much.

With all of the resistors the same value (since you labelled them all R)
you will only get 5 levels, not 16, since there will be 0,1,2,3 or 4
flipflops high.

Right. The resistor values determine the filter response *and* the DAC
response.

If you have a longer chain of flipflops (or even just for 4 of them),
you would be better off not weighting them all the same, but weight the
conductance (1/R) as raised cosine or gaussian or something that will
filter better than a flat-top impulse response.

Yes, given an RC lowpass filter at some 10s of KHz, any rolloff from
this trick would be way out there and not very helpful. A single
resync flop could still be useful, clean fast edges powered by some
vref.

The project is to put some number of programmable isolated ac/dc dummy
loads on a fixed-size board. The ultimate problem will be to dump the
heat.







--

I yam what I yam - Popeye

 

[Jan Panteltje]

On a sunny day (Fri, 17 Dec 2021 18:49:36 -0800) it happened
jlarkin@highlandsniptechnology.com wrote in
<qfiqrghi0a53qhjqsn048smqah7ltqk895@4ax.com>:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

No idea what your speed requirements are, but the i2c PCF8591 I have used
many times.
You would need to isolate sda and scl, also sda pulldown backwards.
It is an 8 bit ADC + DAC in one 16 pin DIL.
But then you can go 2 ways.

 

[Klaus Kragelund]

18.12.21 03:49, jlarkin@highlandsniptechnology.com wrote:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.


You could use an Icoupler. They have 10ns ish propagation delay and comes with ability to generate supply also. Then filter the PWM and you are done

--
Klaus

 

[Phil Hobbs]

jlarkin@highlandsniptechnology.com wrote:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.



Sure, that works. It\'s a species of transversal filter.

You can also make a waveform generator using one or more HC4018 counters
and weighted resistors. We had a discussion with George a few years
back about that.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[server]

On Sat, 18 Dec 2021 15:56:51 GMT, Jan Panteltje
<pNaOnStPeAlMtje@yahoo.com> wrote:

On a sunny day (Fri, 17 Dec 2021 18:49:36 -0800) it happened
jlarkin@highlandsniptechnology.com wrote in
qfiqrghi0a53qhjqsn048smqah7ltqk895@4ax.com>:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

No idea what your speed requirements are, but the i2c PCF8591 I have used
many times.
You would need to isolate sda and scl, also sda pulldown backwards.
It is an 8 bit ADC + DAC in one 16 pin DIL.
But then you can go 2 ways.

There is one faction here that wants to put a uP up on the isolated
side and use its DAC and ADC channels and let it close loops and such.
OK, but we\'d have to pick a chip that won\'t be EOL in a few years, and
it would need its own program.



--

I yam what I yam - Popeye

 

[server]

On Sat, 18 Dec 2021 17:24:39 +0100, Klaus Kragelund
<klauskvik@hotmail.com> wrote:

18.12.21 03:49, jlarkin@highlandsniptechnology.com wrote:
I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.


You could use an Icoupler. They have 10ns ish propagation delay and comes with ability to generate supply also. Then filter the PWM and you are done

If I want analog accuracy, I\'d prefer to run the PWM or D-S through a
fast gate or flop that\'s powered by some good reference, dropped down
from whatever isolated supply. A resistor and an LM4040 type thing
would do.





--

I yam what I yam - Popeye

 

[server]

On Sat, 18 Dec 2021 11:41:07 -0500, Phil Hobbs
<pcdhSpamMeSenseless@electrooptical.net> wrote:

jlarkin@highlandsniptechnology.com wrote:
I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.



Sure, that works. It\'s a species of transversal filter.

You can also make a waveform generator using one or more HC4018 counters
and weighted resistors. We had a discussion with George a few years
back about that.

Cheers

Phil Hobbs

Here\'s one idea for a floating programmable ac/dc load. It\'s
constant-current, but if we have voltage and current sensors we could
fake constant resistance or constant voltage modes. V1 would be our
isolated DAC.

Given lots of channels on a board, we want to minimize the size and
cost of per-channel isolation. A load doesn\'t have to be especially
accurate.

Version 4
SHEET 1 2092 1028
WIRE 592 -96 496 -96
WIRE 688 -96 592 -96
WIRE 896 -96 768 -96
WIRE 992 -96 896 -96
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WIRE 1472 32 1408 32
WIRE 96 64 96 32
WIRE 1408 64 1408 32
WIRE 32 80 32 32
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WIRE -96 96 -224 96
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WIRE 192 112 64 112
WIRE 304 112 192 112
WIRE 416 112 384 112
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WIRE 1072 112 1040 112
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WIRE 32 176 32 144
WIRE 64 176 32 176
WIRE 1472 176 1472 144
WIRE 1472 176 1440 176
WIRE -224 208 -224 96
WIRE -32 256 -32 128
WIRE 192 256 192 224
WIRE 192 256 -32 256
WIRE 304 256 192 256
WIRE 432 256 384 256
WIRE 496 256 496 128
WIRE 496 256 432 256
WIRE 992 256 992 128
WIRE 1056 256 992 256
WIRE 1104 256 1056 256
WIRE 1296 256 1296 224
WIRE 1296 256 1184 256
WIRE 1536 256 1536 128
WIRE 1536 256 1296 256
WIRE 496 304 496 256
WIRE 992 304 992 256
WIRE 208 320 144 320
WIRE -224 336 -224 288
WIRE 144 352 144 320
WIRE 144 464 144 432
WIRE 496 464 496 384
WIRE 992 464 992 384
FLAG 496 464 0
FLAG -224 336 0
FLAG 144 464 0
FLAG 208 320 V+
FLAG 416 112 G1
FLAG 432 256 S1
FLAG -96 96 IN
FLAG 592 -96 D1
FLAG 992 464 0
FLAG 1072 112 G2
FLAG 1056 256 S2
FLAG 896 -96 D2
FLAG 1568 96 IN
FLAG 64 176 V+
FLAG 1440 176 V+
FLAG 96 64 0
FLAG 1408 64 0
SYMBOL Opamps\\\\UniversalOpamp2 32 112 M180
WINDOW 0 -77 53 Left 2
SYMATTR InstName U1
SYMBOL nmos 448 32 R0
WINDOW 0 98 37 Left 2
WINDOW 3 83 74 Left 2
SYMATTR InstName M1
SYMATTR Value BSC240N12NS3
SYMBOL res 400 96 R90
WINDOW 0 -41 58 VBottom 2
WINDOW 3 -36 58 VTop 2
SYMATTR InstName R1
SYMATTR Value 100
SYMBOL res 480 288 R0
WINDOW 0 54 43 Left 2
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SYMATTR InstName R2
SYMATTR Value 1
SYMBOL voltage -224 192 R0
WINDOW 0 49 75 Left 2
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WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value SINE(0.2 0 100)
SYMBOL voltage 144 336 R0
WINDOW 0 51 55 Left 2
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WINDOW 123 0 0 Left 0
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SYMATTR InstName V3
SYMATTR Value 8
SYMBOL res 400 240 R90
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SYMBOL voltage 672 -96 R270
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WINDOW 3 -100 -7 VRight 2
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SYMATTR Value SINE(0 10 10)
SYMBOL Opamps\\\\UniversalOpamp2 1472 112 R180
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SYMATTR InstName U2
SYMBOL nmos 1040 32 M0
WINDOW 0 98 37 Left 2
WINDOW 3 83 74 Left 2
SYMATTR InstName M2
SYMATTR Value BSC240N12NS3
SYMBOL res 1088 96 M90
WINDOW 0 -41 58 VBottom 2
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SYMATTR Value 100
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SYMATTR InstName R5
SYMATTR Value 1
SYMBOL res 1088 240 M90
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SYMATTR InstName R6
SYMATTR Value 1K
SYMBOL cap 176 160 R0
WINDOW 0 41 13 Left 2
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SYMATTR InstName C1
SYMATTR Value 100p
SYMBOL cap 1280 160 R0
WINDOW 0 -47 8 Left 2
WINDOW 3 -56 45 Left 2
SYMATTR InstName C2
SYMATTR Value 100p
TEXT 680 416 Left 2 !.tran 100m
TEXT 624 256 Left 2 ;Programmable Load
TEXT 640 304 Left 2 ;JL Nov 17 2021
TEXT 696 216 Left 2 ;Bipolar
TEXT -192 136 Left 2 ;current
TEXT -192 168 Left 2 ;request
TEXT 680 -176 Left 2 ;customer
TEXT 704 -152 Left 2 ;input
TEXT 376 424 Left 2 ;floating
TEXT 376 448 Left 2 ;common




--

I yam what I yam - Popeye

 

[server]

On Sat, 18 Dec 2021 23:24:42 +1100, Chris Jones
<lugnut808@spam.yahoo.com> wrote:

On 18/12/2021 13:49, jlarkin@highlandsniptechnology.com wrote:
I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

Probably not much advantage to it.

You might need slightly less filtering after it, but that isn\'t likely
to save you much.

With all of the resistors the same value (since you labelled them all R)
you will only get 5 levels, not 16, since there will be 0,1,2,3 or 4
flipflops high.

If you have a longer chain of flipflops (or even just for 4 of them),
you would be better off not weighting them all the same, but weight the
conductance (1/R) as raised cosine or gaussian or something that will
filter better than a flat-top impulse response.

With R..2R.. resistors I\'d get 16 levels, but have choices of where to
put the resistors. That\'s too hard to think about.

Might be a thesus or something.



--

I yam what I yam - Popeye

 

[Phil Hobbs]

jlarkin@highlandsniptechnology.com wrote:

On Sat, 18 Dec 2021 15:56:51 GMT, Jan Panteltje
pNaOnStPeAlMtje@yahoo.com> wrote:

On a sunny day (Fri, 17 Dec 2021 18:49:36 -0800) it happened
jlarkin@highlandsniptechnology.com wrote in
qfiqrghi0a53qhjqsn048smqah7ltqk895@4ax.com>:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

No idea what your speed requirements are, but the i2c PCF8591 I have used
many times.
You would need to isolate sda and scl, also sda pulldown backwards.
It is an 8 bit ADC + DAC in one 16 pin DIL.
But then you can go 2 ways.

There is one faction here that wants to put a uP up on the isolated
side and use its DAC and ADC channels and let it close loops and such.
OK, but we\'d have to pick a chip that won\'t be EOL in a few years, and
it would need its own program.



Well, just pick one with 100k in stock at DK. No, wait,....

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
http://hobbs-eo.com

 

[Jan Panteltje]

On a sunny day (Sat, 18 Dec 2021 09:14:31 -0800) it happened
jlarkin@highlandsniptechnology.com wrote in
<dj5srgtk9f8b9fnbfb12f7hgthb12sosgd@4ax.com>:

On Sat, 18 Dec 2021 15:56:51 GMT, Jan Panteltje
pNaOnStPeAlMtje@yahoo.com> wrote:

On a sunny day (Fri, 17 Dec 2021 18:49:36 -0800) it happened
jlarkin@highlandsniptechnology.com wrote in
qfiqrghi0a53qhjqsn048smqah7ltqk895@4ax.com>:

I need an isolated DAC. I could just generate a PWM thing, isolate it,
and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.

No idea what your speed requirements are, but the i2c PCF8591 I have used
many times.
You would need to isolate sda and scl, also sda pulldown backwards.
It is an 8 bit ADC + DAC in one 16 pin DIL.
But then you can go 2 ways.

There is one faction here that wants to put a uP up on the isolated
side and use its DAC and ADC channels and let it close loops and such.
OK, but we\'d have to pick a chip that won\'t be EOL in a few years, and
it would need its own program.

The reason I like Microchip PICs is thet even the old ones are still available.
Farnell has 18F14K22 (the one I use) in stock, 2 Euro 30 cents for 1.
It has hardware PWM, and 12 10 bit analog input channels,
and 2 analog comparators...
But the PIC istruction set is a bit different .. skip next instruction if true / false sort of thing.

 

[Tom Del Rosso]

Lasse Langwadt Christensen wrote:

lørdag den 18. december 2021 kl. 03.49.47 UTC+1 skrev
jla...@highlandsniptechnology.com:
I need an isolated DAC. I could just generate a PWM thing, isolate
it, and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.


it is basically a FIR filter, so it\'s just an extra filter before
your filter

if you are going to add a FF anyway why not 8, like 74hc164

This brings up a question that nags me but never came up in anything I
read.

Don\'t you have to control the output voltages precisely? The MSB
output\'s variability can swamp the outputs 6 bits down the line.


--
Defund the Thought Police
Andiamo Brandon!

 

[Rick C]

On Thursday, December 23, 2021 at 2:12:40 AM UTC-4, Tom Del Rosso wrote:

Lasse Langwadt Christensen wrote:
lørdag den 18. december 2021 kl. 03.49.47 UTC+1 skrev
jla...@highlandsniptechnology.com:
I need an isolated DAC. I could just generate a PWM thing, isolate
it, and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.


it is basically a FIR filter, so it\'s just an extra filter before
your filter

if you are going to add a FF anyway why not 8, like 74hc164
This brings up a question that nags me but never came up in anything I
read.

Don\'t you have to control the output voltages precisely? The MSB
output\'s variability can swamp the outputs 6 bits down the line.

You might see some high frequency noise from a supply to digital circuitry, but the voltage should be stable at lower frequencies even if not highly accurate. Unless there is an excessively heavy load on the output, there won\'t be enough current to load the digital outputs. If needed, the supply could be from a separate regulator with significant filtering on the input. There\'s not enough indication of requirements to offer any truly constructive advice.

--

Rick C.

- Get 1,000 miles of free Supercharging
- Tesla referral code - https://ts.la/richard11209

 

[Jan Panteltje]

On a sunny day (Thu, 23 Dec 2021 01:06:39 -0500) it happened \"Tom Del Rosso\"
<fizzbintuesday@that-google-mail-domain.com> wrote in
<sq140i$pe0$1@dont-email.me>:

Lasse Langwadt Christensen wrote:
lørdag den 18. december 2021 kl. 03.49.47 UTC+1 skrev
jla...@highlandsniptechnology.com:
I need an isolated DAC. I could just generate a PWM thing, isolate
it, and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.


it is basically a FIR filter, so it\'s just an extra filter before
your filter

if you are going to add a FF anyway why not 8, like 74hc164

This brings up a question that nags me but never came up in anything I
read.

Don\'t you have to control the output voltages precisely? The MSB
output\'s variability can swamp the outputs 6 bits down the line.

On CMOS the output with high resistive load is rail to rail.
Yes supply voltage should be stable and ripple free of course.
I have done 8 bits R2R on FPGA output with analog video and it looked OK.
And yes I tested with a horizontal ramp for obvious errors.
Then again analog video composite was not so critical.
But a real DAC is of course safer -)

 

[John Larkin]

On Thu, 23 Dec 2021 01:06:39 -0500, \"Tom Del Rosso\"
<fizzbintuesday@that-google-mail-domain.com> wrote:

Lasse Langwadt Christensen wrote:
lørdag den 18. december 2021 kl. 03.49.47 UTC+1 skrev
jla...@highlandsniptechnology.com:
I need an isolated DAC. I could just generate a PWM thing, isolate
it, and lowpass filter on the high side. But we could also generate a
delta-sigma bit stream, which has advantages. If d-s, I might want to
reclock it before lowpass filtering to get clean, fast edges.

But then I could drive several d-flops.

https://www.dropbox.com/s/0d7x6l6isyoldva/ML_DS_Dac.jpg?raw=1

The analog signal now has 16 levels instead of two, sorta random but
still 16.

Is this worth doing? It\'s hard to think about on a Friday night after
pasta and beer.


it is basically a FIR filter, so it\'s just an extra filter before
your filter

if you are going to add a FF anyway why not 8, like 74hc164

This brings up a question that nags me but never came up in anything I
read.

Don\'t you have to control the output voltages precisely? The MSB
output\'s variability can swamp the outputs 6 bits down the line.

My suggestion isn\'t a resistive DAC in the classic sense. It\'s a
transversal filter.

Delta-sigma encodes a voltage as average duty cycle. Each resistor
contributes to the output in proportion to its duty cycle, so the
system is linear independent of resistor values.

--

If a man will begin with certainties, he shall end with doubts,
but if he will be content to begin with doubts he shall end in certainties.
Francis Bacon