static timing analysis

A

alb

Guest
Hi everyone,

any good reference on STA? I know roughly well the principles but I've
always wanted to get a deeper understanding of this - vast - subject,
especially the algorithms behind it.

I often find formulas not very accurate and lacking of important aspects
like clock skew or clock-to-out delays.

Thanks for any pointer.

Al

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alb <al.basili@gmail.com> wrote:
any good reference on STA? I know roughly well the principles but I've
always wanted to get a deeper understanding of this - vast - subject,
especially the algorithms behind it.

Ok, I did some homework on my side and found a couple of references:

1. Constraining Designs for Synthesis and Timing Analysis: A Practical
Guide to Synopsys Design Constraints (SDC) (S. Gangadharan, S.
Churiwala)
- ISBN-10: 1461432685 | ISBN-13: 978-1461432685 | Edition: 2013

2. Static Timing Analysis for Nanometer Designs: A Practical Approach
(J. Bhasker, R.Chadha)
- ISBN-10: 0387938192 | ISBN-13: 978-0387938196 | Edition: 2009

3. Timing (Sachin Sapatnekar)
- ISBN-10: 1441954082 | ISBN-13: 978-1441954084 | Edition: 2004

Any idea about their added value? On Amazon there's a review on 2. which
is not very encouraging, here's an excerpt:

I'm disappointed with "Static Timing Analysis for Nanometer
Designs"[...] There's little to nothing about how timing analysis
itself is done; [...] I'm not a timing expert, but for a "book [that]
can be used as a reference for a graduate course in chip design" (p.
xivv), the exposition stayed quite rudimentary. Most explanations are
predicated on a common clock, and some issues with setup and hold on
multi-cycle paths are not mentioned;

Well, if anyone has read any of the above and has a comment I would
certainly appreciate it.

Al
 

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