Spice model 4069UB

M

Malcolm Reeves

Guest
Hi,

I'm still not happy with my spice models. I ask this before and was
given this:

* CD4069UB CMOS HEX INVERTER as amplifier
*connections A(in) G(out) VDD VSS
..subckt 4069UB 6 1 4 10
M2 1 6 10 10 CD4069BN
M3 1 6 4 4 CD4069BP
..MODEL CD4069BN NMOS (LEVEL=1 VTO=2.1 KP=2.9M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=20.2 RS=184.1 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
..MODEL CD4069BP PMOS (LEVEL=1 VTO=-2.9 KP=2M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=28.2 RS=145.2 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
..ENDS 4069UB
*$

I've tried this on ac analysis, that from the output 1F/1G filter,
gain of 1 buffer, 1VAC source. The ac source scans the frequency
response and the rest set the dc level. At 5V the above circuit has
next to no gain. At 15V the gain is 350 up to 10kHz then rolls off.
At 5V supply the gain is rolling off at 10Hz. The model is just not
accurate.

Jim has sent me his HCU04 model but I'm actually using a 4069 since in
practice I can't see an circuit differences except the 4069 takes less
current. That has a flat gain of 12 which also isn't right. There is
still quite some gain at 100kHz.

Anyone have a better model or can tell me what of the multitude of
params I should vary to get the model right?

TIA

--

Malcolm

Malcolm Reeves BSc CEng MIEE MIRSE, Full Circuit Ltd, Chippenham, UK
(mreeves@fullcircuit.com, mreeves@fullcircuit.co.uk or mreeves@iee.org).
Design Service for Analogue/Digital H/W & S/W Railway Signalling and Power
electronics. More details plus freeware, Win95/98 DUN and Pspice tips, see:

http://www.fullcircuit.com or http://www.fullcircuit.co.uk

NEW - www.CharteredConsultant.co.uk - The Consultant A-List
 
On Sun, 26 Jun 2005 18:30:12 +0100, Malcolm Reeves
<mreeves@fullcircuit.com> wrote:

Hi,

I'm still not happy with my spice models. I ask this before and was
given this:

* CD4069UB CMOS HEX INVERTER as amplifier
*connections A(in) G(out) VDD VSS
.subckt 4069UB 6 1 4 10
M2 1 6 10 10 CD4069BN
M3 1 6 4 4 CD4069BP
.MODEL CD4069BN NMOS (LEVEL=1 VTO=2.1 KP=2.9M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=20.2 RS=184.1 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.MODEL CD4069BP PMOS (LEVEL=1 VTO=-2.9 KP=2M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=28.2 RS=145.2 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.ENDS 4069UB
*$

I've tried this on ac analysis, that from the output 1F/1G filter,
gain of 1 buffer, 1VAC source. The ac source scans the frequency
response and the rest set the dc level. At 5V the above circuit has
next to no gain. At 15V the gain is 350 up to 10kHz then rolls off.
At 5V supply the gain is rolling off at 10Hz. The model is just not
accurate.

Jim has sent me his HCU04 model but I'm actually using a 4069 since in
practice I can't see an circuit differences except the 4069 takes less
current. That has a flat gain of 12 which also isn't right. There is
still quite some gain at 100kHz.

Anyone have a better model or can tell me what of the multitude of
params I should vary to get the model right?

TIA
Malcolm, How are you setting up the bias to put the inverter in the
"linear" region?

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
On Sun, 26 Jun 2005 10:53:29 -0700, Jim Thompson
<thegreatone@example.com> wrote:

On Sun, 26 Jun 2005 18:30:12 +0100, Malcolm Reeves
mreeves@fullcircuit.com> wrote:

Hi,

I'm still not happy with my spice models. I ask this before and was
given this:

* CD4069UB CMOS HEX INVERTER as amplifier
*connections A(in) G(out) VDD VSS
.subckt 4069UB 6 1 4 10
M2 1 6 10 10 CD4069BN
M3 1 6 4 4 CD4069BP
.MODEL CD4069BN NMOS (LEVEL=1 VTO=2.1 KP=2.9M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=20.2 RS=184.1 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.MODEL CD4069BP PMOS (LEVEL=1 VTO=-2.9 KP=2M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=28.2 RS=145.2 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.ENDS 4069UB
*$

I've tried this on ac analysis, that from the output 1F/1G filter,
gain of 1 buffer, 1VAC source. The ac source scans the frequency
response and the rest set the dc level. At 5V the above circuit has
next to no gain. At 15V the gain is 350 up to 10kHz then rolls off.
At 5V supply the gain is rolling off at 10Hz. The model is just not
accurate.

Jim has sent me his HCU04 model but I'm actually using a 4069 since in
practice I can't see an circuit differences except the 4069 takes less
current. That has a flat gain of 12 which also isn't right. There is
still quite some gain at 100kHz.

Anyone have a better model or can tell me what of the multitude of
params I should vary to get the model right?

TIA

Malcolm, How are you setting up the bias to put the inverter in the
"linear" region?
The output of the inverter feeds a 1g/1F RC i.e. the RC only pass dc.
E source buffers this. Next is series 1VAC source which feeds back to
the input. Hence input is 1VAC on top of dc from output. Bias then
finds its own level. Analysis is ac of course, so small signal.

BTW input (and output) bias points on 5V supply is 2.1V for 4069UB
model, 2.383V for your HCU04 model. For 4069UB on 15V rail bias
settles to 7.040V.


--

Malcolm

Malcolm Reeves BSc CEng MIEE MIRSE, Full Circuit Ltd, Chippenham, UK
(mreeves@fullcircuit.com, mreeves@fullcircuit.co.uk or mreeves@iee.org).
Design Service for Analogue/Digital H/W & S/W Railway Signalling and Power
electronics. More details plus freeware, Win95/98 DUN and Pspice tips, see:

http://www.fullcircuit.com or http://www.fullcircuit.co.uk

NEW - www.CharteredConsultant.co.uk - The Consultant A-List
 
"Malcolm Reeves" <mreeves@fullcircuit.com> schrieb im Newsbeitrag
news:tvutb1dsoigdg9ieimne3lku5c0547ltjo@4ax.com...
On Sun, 26 Jun 2005 10:53:29 -0700, Jim Thompson
thegreatone@example.com> wrote:

On Sun, 26 Jun 2005 18:30:12 +0100, Malcolm Reeves
mreeves@fullcircuit.com> wrote:

Hi,

I'm still not happy with my spice models. I ask this before and was
given this:

* CD4069UB CMOS HEX INVERTER as amplifier
*connections A(in) G(out) VDD VSS
.subckt 4069UB 6 1 4 10
M2 1 6 10 10 CD4069BN
M3 1 6 4 4 CD4069BP
.MODEL CD4069BN NMOS (LEVEL=1 VTO=2.1 KP=2.9M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=20.2 RS=184.1 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.MODEL CD4069BP PMOS (LEVEL=1 VTO=-2.9 KP=2M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=28.2 RS=145.2 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.ENDS 4069UB
*$

I've tried this on ac analysis, that from the output 1F/1G filter,
gain of 1 buffer, 1VAC source. The ac source scans the frequency
response and the rest set the dc level. At 5V the above circuit has
next to no gain. At 15V the gain is 350 up to 10kHz then rolls off.
At 5V supply the gain is rolling off at 10Hz. The model is just not
accurate.

Jim has sent me his HCU04 model but I'm actually using a 4069 since in
practice I can't see an circuit differences except the 4069 takes less
current. That has a flat gain of 12 which also isn't right. There is
still quite some gain at 100kHz.

Anyone have a better model or can tell me what of the multitude of
params I should vary to get the model right?

TIA

Malcolm, How are you setting up the bias to put the inverter in the
"linear" region?

The output of the inverter feeds a 1g/1F RC i.e. the RC only pass dc.
E source buffers this. Next is series 1VAC source which feeds back to
the input. Hence input is 1VAC on top of dc from output. Bias then
finds its own level. Analysis is ac of course, so small signal.

BTW input (and output) bias points on 5V supply is 2.1V for 4069UB
model, 2.383V for your HCU04 model. For 4069UB on 15V rail bias
settles to 7.040V.


--

Malcolm

Hello Malcolm,

The threshhold votages of both transistors are too high.
The drain currents are in the pA range. I am sure the used
VTO in the models are fallen from the sky but not from real
measurements. :)

Best regards,
Helmut


SPICE output from additional .OP in LTspice:
--------------------------------------------

Direct Newton iteration for .op point succeeded.
Semiconductor Device Operating Points:
--- MOSFET Transistors ---
Name: m:u1:3 m:u1:2
Model: u1:cd4069bp u1:cd4069bn
Id: -2.93e-12 3.75e-12
Vgs: -2.90e+00 2.10e+00
Vds: -2.90e+00 2.10e+00
Vbs: 0.00e+00 0.00e+00
Vth: -2.90e+00 2.10e+00
Vdsat: 0.00e+00 3.34e-05
Gm: 0.00e+00 9.71e-08
Gds: 0.00e+00 3.02e-15
Gmb: 0.00e+00 2.23e-13
Cbd: 2.35e-11 2.63e-11
Cbs: 5.72e-11 5.72e-11
Cgsov: 7.02e-12 7.02e-12
Cgdov: 5.85e-12 5.85e-12
Cgbov: 9.63e-12 9.63e-12
Cgs: 0.00e+00 0.00e+00
Cbd: 0.00e+00 0.00e+00
Cgb: 0.00e+00 0.00e+00
 
On 26 Jun 2005 20:23:26 -0700, LoneStar51@gmail.com wrote:

Hmm.. the CD-4069UB is a buffered CMOS device.
Not according to the datasheet.



--

Malcolm

Malcolm Reeves BSc CEng MIEE MIRSE, Full Circuit Ltd, Chippenham, UK
(mreeves@fullcircuit.com, mreeves@fullcircuit.co.uk or mreeves@iee.org).
Design Service for Analogue/Digital H/W & S/W Railway Signalling and Power
electronics. More details plus freeware, Win95/98 DUN and Pspice tips, see:

http://www.fullcircuit.com or http://www.fullcircuit.co.uk

NEW - www.CharteredConsultant.co.uk - The Consultant A-List
 
On Sun, 26 Jun 2005 18:30:12 +0100, Malcolm Reeves
<mreeves@fullcircuit.com> wrote:

Hi,

I'm still not happy with my spice models. I ask this before and was
given this:

* CD4069UB CMOS HEX INVERTER as amplifier
*connections A(in) G(out) VDD VSS
.subckt 4069UB 6 1 4 10
M2 1 6 10 10 CD4069BN
M3 1 6 4 4 CD4069BP
.MODEL CD4069BN NMOS (LEVEL=1 VTO=2.1 KP=2.9M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=20.2 RS=184.1 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.MODEL CD4069BP PMOS (LEVEL=1 VTO=-2.9 KP=2M GAMMA=3.97U
+ PHI=.75 LAMBDA=1.87M RD=28.2 RS=145.2 IS=31.2F PB=.8 MJ=.46
+ CBD=47.6P CBS=57.2P CGSO=70.2N CGDO=58.5N CGBO=96.3N)
.ENDS 4069UB
*$

I've tried this on ac analysis, that from the output 1F/1G filter,
gain of 1 buffer, 1VAC source. The ac source scans the frequency
response and the rest set the dc level. At 5V the above circuit has
next to no gain. At 15V the gain is 350 up to 10kHz then rolls off.
At 5V supply the gain is rolling off at 10Hz. The model is just not
accurate.

Jim has sent me his HCU04 model but I'm actually using a 4069 since in
practice I can't see an circuit differences except the 4069 takes less
current. That has a flat gain of 12 which also isn't right. There is
still quite some gain at 100kHz.

Anyone have a better model or can tell me what of the multitude of
params I should vary to get the model right?

TIA
Malcolm, Check it with my LoopGain tool. I get 33dB of loop gain out
to about 10MHz.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.
 
Hmm.. the CD-4069UB is a buffered CMOS device. Instead of a single
inverting pair of fets, there are three pairs in cascade for each
inverter. Also, the geometry of the fets vary greatly by manufacturer
and by production run. Using them in an analog circuit for a long run
product is inviting constant trips to the production line to fix the
design every time the parts ordering clerk gets a better price from a
different maker. Even specing only a certain maker doesn't always
work, since he may improve his process to increase profits and change
the fet performance.
 

Welcome to EDABoard.com

Sponsor

Back
Top