Spice lib spectre from Cadence 5 to 6

S

StreAMnewal

Guest
I convert my project from 5 to 6 version.

When I try to simulate with old library this message appears.

http://
img708.imageshack.us/img708/3571/spice.th.png


When I write "simulate lang = spice" in My *.scs lib file this
appears

http://
img821.imageshack.us/img821/2100/cadenceerror.th.png


Description of MOS tran with nmos param

http://
img689.imageshack.us/img689/4527/facellmodel.th.png


How can I use this model to simulate project? That lib works in
Cadence 5.

//There is no name like nmos4, pmos4

* Nterest

..model kn nmos level=2 phi=.65 tox=55n xj=.34u tpg=0
+ VTO=0.5 LD=0.15u WD=.04u UO=460
+ NSUB=25E+15
+ CJ=0.0004
+ GAMMA=1.1
*
..model kn_nat nmos level=2 phi=.65 tox=55n xj=.34u tpg=0
+ VTO=0.5 LD=0.15u WD=.04u UO=460
+ NSUB=25E+15
+ CJ=0.0004
+ GAMMA=1.1
*
..MODEL Kp PMOS LEVEL=2 PHI=0.65 TOX=55n XJ=0.4U TPG=0
+ VTO=-1.1 LD=.25u WD=.04u UO=160
+ NSUB=1.1E+15
+ CJ=3.1E-04
+ GAMMA=0.27
..MODEL kp_lVt PMOS LEVEL=2 PHI=0.65 TOX=55n XJ=0.4U TPG=0
+ VTO=-1.1 LD=.25u WD=.04u UO=160
+ NSUB=1.1E+15
+ CJ=3.1E-04
+ GAMMA=0.27
..model diod d(is=1.0e-12 rs=2 cjo=1p bv=50 vj=.6)
..model diode d(is=1.0e-12 rs=2 cjo=1p bv=50 vj=.6)
*.subckt mkn d g s b
*mkn d g s b kn w=w l=l
*.ends mkn

I try add .model kn [b:04c4788e6a]nmos4[/b:04c4788e6a] level=2 phi=.65 tox=55n xj=.34u
tpg=0
+ VTO=0.5 LD=0.15u WD=.04u UO=460
+ NSUB=25E+15
+ CJ=0.0004
+ GAMMA=1.1

That does not solve the problem.
 
StreAMnewal wrote, on 06/11/10 06:31:
I convert my project from 5 to 6 version.

When I try to simulate with old library this message appears.

http://
img708.imageshack.us/img708/3571/spice.th.png


When I write "simulate lang = spice" in My *.scs lib file this
appears

http://
img821.imageshack.us/img821/2100/cadenceerror.th.png


Description of MOS tran with nmos param

http://
img689.imageshack.us/img689/4527/facellmodel.th.png


How can I use this model to simulate project? That lib works in
Cadence 5.

//There is no name like nmos4, pmos4

* Nterest

.model kn nmos level=2 phi=.65 tox=55n xj=.34u tpg=0
+ VTO=0.5 LD=0.15u WD=.04u UO=460
+ NSUB=25E+15
+ CJ=0.0004
+ GAMMA=1.1
*
.model kn_nat nmos level=2 phi=.65 tox=55n xj=.34u tpg=0
+ VTO=0.5 LD=0.15u WD=.04u UO=460
+ NSUB=25E+15
+ CJ=0.0004
+ GAMMA=1.1
*
.MODEL Kp PMOS LEVEL=2 PHI=0.65 TOX=55n XJ=0.4U TPG=0
+ VTO=-1.1 LD=.25u WD=.04u UO=160
+ NSUB=1.1E+15
+ CJ=3.1E-04
+ GAMMA=0.27
.MODEL kp_lVt PMOS LEVEL=2 PHI=0.65 TOX=55n XJ=0.4U TPG=0
+ VTO=-1.1 LD=.25u WD=.04u UO=160
+ NSUB=1.1E+15
+ CJ=3.1E-04
+ GAMMA=0.27
.model diod d(is=1.0e-12 rs=2 cjo=1p bv=50 vj=.6)
.model diode d(is=1.0e-12 rs=2 cjo=1p bv=50 vj=.6)
*.subckt mkn d g s b
*mkn d g s b kn w=w l=l
*.ends mkn

I try add .model kn [b:38baca2e61]nmos4[/b:38baca2e61] level=2 phi=.65 tox=55n xj=.34u
tpg=0
+ VTO=0.5 LD=0.15u WD=.04u UO=460
+ NSUB=25E+15
+ CJ=0.0004
+ GAMMA=1.1

That does not solve the problem.
Answered this on the Cadence Community forum. Most likely due to not having
$CDS_Netlisting_Mode set to "Analog".

http://www.cadence.com/community/forums/T/15930.aspx

Andrew
 

Welcome to EDABoard.com

Sponsor

Back
Top