speed in FPGA

[xia]

Hi guys:
How fast is a 10-bit mutiplier in FPGA?

Frigile

 

[Austin Lesea]

Xia,

Signed, or unsigned? Hard multiplier core (as in Virtex II, II Pro,
Spartan III, Virtex 4), pipelined, or non-pipelined? Soft multiplier
core (built from LUTs)? Constant multiplier, or one which allows both
inputs to be variables?

http://www.xilinx.com/ipcenter/catalog/logicore/docs/mult_gen.pdf

The unsigned harware multiplier in VII Pro is 1.81 ns for a 10 bit
multiply (fastest speed grade). So if you can pipeline it, and feed it
fast enough that would be ~ 2ns per 10 bit X 10 bit multiply, or 500
million multiplies per second.....

And with 444 multipliers in the largest part, that is one heck of a lot
of multiplying action.

Austin

xia wrote:

Hi guys:
How fast is a 10-bit mutiplier in FPGA?

Frigile