Spectre vs SpectreS

S

sykab

Guest
Hi!

Can anyone tell me the difference between Spectre and SpectreS?
 
sykab wrote:
Can anyone tell me the difference between Spectre and SpectreS?
Click to expand...
The interface by which ADE communicates with the simulator. SpectreS uses a socket interface, and
spectre uses a direct interface. Socket interfaces are deprecated.


Stéphane
 
On Apr 28, 3:52 pm, "S. Badel" <stephane.ba...@REMOVETHISepfl.ch>
wrote:
sykab wrote:
Can anyone tell me the difference between Spectre and SpectreS?

The interface by which ADE communicates with the simulator. SpectreS uses a socket interface, and
spectre uses a direct interface. Socket interfaces are deprecated.

Stéphane
Click to expand...
Thanks.

Can you tell me how it interferes in the simulation efficiency?
 
Hi There,

SpectreS is obsolete and is there for compatibility with old stuff
only, don't use it unless in this case.
Well, Spectre is a Direct Simulation based whereas SpectreS is Socket
Simulation based. I think spectre was spectreD at the very first but
not sure ... (The suffux D stands for direct adn S for Socket, same as
for Hspice, Eldo). The direct simulation has been introduced by
Cadence in 4.4.3 release.

There are fundamental differences between them, the best for you is to
give a look at the following doc in your Cadence stream :
VirtuosoŽ Analog Design Environment User Guide : $CDSHOME/doc/
anasimhelp/anasimhelp.pdf

These are bits of comments from this doc :

For the 4.4.3 and later releases, direct simulation is preferred over
socket simulation.
Cadences development is focused on direct simulation. Socket
simulation is given minimal
development. This means that only a limited number of enhancements are
made to these
products, and only important bugs are fixed. Inherited connections,
for example, is available
for both spectre and spectreS. Direct simulation is available in the
4.4.3 release for spectre,
and, of course, spectreVerilog.

Note: An important difference between direct and socket simulation is
that in case of socket
netlisting (with simulators such as spectreS, hspiceS and cdsSpice),
AEL keywords and
constants such as boltzman, charge, degPerRad, epp0, pi, sqrt2, twoPi
and so on
are evaluated and passed to the final netlist via Cadence SPICE. In
case of direct netlisting
(with simulators such as spectre, hspiceD and UltraSim), these
keywords are treated as
design variables and the netlister expects values for these variables
to be defined during
netlisting.

Important Benefits of Direct Simulation => Continue reading the
doc ...
.....
Important Use-Model Differences between spectreS and spectre =>
Continue reading the doc again ;-) ...

Hope it helps !

Riad.
 
On 28 Abr, 17:28, Riad KACED <riad.ka...@gmail.com> wrote:
Hi There,

SpectreS is obsolete and is there for compatibility with old stuff
only, don't use it unless in this case.
Well, Spectre is a Direct Simulation based whereas SpectreS is Socket
Simulation based. I think spectre was spectreD at the very first but
not sure ... (The suffux D stands for direct adn S for Socket, same as
for Hspice, Eldo). The direct simulation has been introduced by
Cadence in 4.4.3 release.

There are fundamental differences between them, the best for you is to
give a look at the following doc in your Cadence stream :
VirtuosoŽ Analog Design Environment User Guide : $CDSHOME/doc/
anasimhelp/anasimhelp.pdf

These are bits of comments from this doc :

For the 4.4.3 and later releases, direct simulation is preferred over
socket simulation.
Cadences development is focused on direct simulation. Socket
simulation is given minimal
development. This means that only a limited number of enhancements are
made to these
products, and only important bugs are fixed. Inherited connections,
for example, is available
for both spectre and spectreS. Direct simulation is available in the
4.4.3 release for spectre,
and, of course, spectreVerilog.

Note: An important difference between direct and socket simulation is
that in case of socket
netlisting (with simulators such as spectreS, hspiceS and cdsSpice),
AEL keywords and
constants such as boltzman, charge, degPerRad, epp0, pi, sqrt2, twoPi
and so on
are evaluated and passed to the final netlist via Cadence SPICE. In
case of direct netlisting
(with simulators such as spectre, hspiceD and UltraSim), these
keywords are treated as
design variables and the netlister expects values for these variables
to be defined during
netlisting.

Important Benefits of Direct Simulation => Continue reading the
doc ...
.....
Important Use-Model Differences between spectreS and spectre =
Continue reading the doc again ;-) ...

Hope it helps !

Riad.
Click to expand...
Excellent explanation!

Thanks =)
 
Emmm, I was a little bit nosy and I've googled your question into this
group.
It did come to this forum by the past actually. You could have made a
little search ;-)

Anyway, here is the link ...
http://groups.google.com/group/comp.cad.cadence/browse_thread/thread/5af30c81e7e3f699/b5ddb28dac514ef5?lnk=gst&q=spectre+spectres+difference#b5ddb28dac514ef5

Enjoy
 
On 28 Abr, 17:44, Riad KACED <riad.ka...@gmail.com> wrote:
Emmm, I was a little bit nosy and I've googled your question into this
group.
It did come to this forum by the past actually. You could have made a
little search ;-)

Anyway, here is the link ...http://groups.google.com/group/comp.cad.cadence/browse_thread/thread/...

Enjoy
Click to expand...
shame on me :(
 
There is no Shame, no worries !
One has to be curious sometimes ...

Riad.
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top