Spectre: ALTERing arrayed instances (ADE version: IC6.1.5.50

Guest
Dear all,

I have a capacitor in my design that uses arrayed instancing, something like following in my netlist:

....
Cm\<3\> (a3 b3) Somecapmodel area=somearea3 c=somenumber3
Cm\<2\> (a2 b2) Somecapmodel area=somearea2 c=somenumber2
Cm\<1\> (a1 b1) Somecapmodel area=somearea1 c=somenumber1
Cm\<0\> (a0 b0) Somecapmodel area=somearea0 c=somenumber0
....

I am trying to use ALTER to modify values/areas of these capacitors, I use an include file and in ADE add the include file usig Setup->Simulation Files menu item. Inside the include file I have a line like the following:

alter1 alter sub=top.block1.block2.block3.Cm\<3\> param=area value=newarea3

I get the following error message:

Error found by spectre during circuit read-in.

ERROR (SFE-874): "somepath" 16: Unexpected equals "=". Expected end of file or end of line.

Can anyone please explain what is happening here? Does this have anything to do with the arrayed instancing used? It has always worked well for other circuit elements not using arrayed instances?!?

Thanks for your help/thoughts.

Regards,

Hrh
 
On 07/15/13 11:36, hhashemp@googlemail.com wrote:
Dear all,

I have a capacitor in my design that uses arrayed instancing, something like following in my netlist:

...
Cm\<3\> (a3 b3) Somecapmodel area=somearea3 c=somenumber3
Cm\<2\> (a2 b2) Somecapmodel area=somearea2 c=somenumber2
Cm\<1\> (a1 b1) Somecapmodel area=somearea1 c=somenumber1
Cm\<0\> (a0 b0) Somecapmodel area=somearea0 c=somenumber0
...

I am trying to use ALTER to modify values/areas of these capacitors,
I
use an include file and in ADE add the include file usig
Setup->Simulation Files menu item. Inside the include file I have a line
like the following:
alter1 alter sub=top.block1.block2.block3.Cm\<3\> param=area value=newarea3

I get the following error message:

Error found by spectre during circuit read-in.

ERROR (SFE-874): "somepath" 16: Unexpected equals "=". Expected end of file or end of line.

Can anyone please explain what is happening here? Does this have
anything to do with the arrayed instancing used? It has always worked
well for other circuit elements not using arrayed instances?!?
Thanks for your help/thoughts.

Regards,

Hrh
I tried this in the same spectre version that you're using - and it
works fine:


//

parameters newarea=3u
subckt mycap (plus minus)
parameters area=1u c=0.1p
I1 (plus minus) capacitor c=c scale=area/1u
ends mycap

subckt block (n2 n1)
//V1 (n1 0) vsource type=dc dc=1
C1 (n1 0) mycap area=1u c=1p
//V2 (n2 0) vsource type=dc dc=1
C\<2\> (n2 0) mycap area=2u c=2p
ends block

top (n2 n1) block

element0 info what=inst where=screen
alt1 alter sub=top.C1 param=c value=3p
element1 info what=inst where=screen
alt2 alter sub=top.C\<2\> param=c value=5p
element2 info what=inst where=screen
alt3 alter sub=top.C\<2\> param=area value=newarea
element3 info what=inst where=screen


Can you try this and see if it works?

Andrew
 

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