Guest
If I use the core generator to generate an IBERT for a Spartan 6 and try to implement the example design the errors I'm getting I'm not understanding. I'm assuming I'm not understanding the back box portion of the example design. Module S6chipscope_ibert.v is in the project. Thanks in advance... Here are the errors, followed by the example design:
ERROR:NgdBuild:604 - logical block 'U_S6CHIPSCOPE_IBERT' with type
'S6chipscope_ibert' could not be resolved. A pin name misspelling can cause
this, a missing edif or ngc file, case mismatch between the block name and
the edif or ngc file name, or the misspelling of a type name. Symbol
'S6chipscope_ibert' is not supported in target 'spartan6'.
ERROR:NgdBuild:604 - logical block 'U_ICON' with type 'chipscope_icon' could not
be resolved. A pin name misspelling can cause this, a missing edif or ngc
file, case mismatch between the block name and the edif or ngc file name, or
the misspelling of a type name. Symbol 'chipscope_icon' is not supported in
target 'spartan6'.
`timescale 1ns / 1ps
//***************************** Module ****************************
module example_S6chipscope_ibert
(
//Input Declarations
input GTP0_X0_Y0_RX_P_IPAD,
input GTP0_X0_Y0_RX_N_IPAD,
input GTP1_X0_Y0_RX_P_IPAD,
input GTP1_X0_Y0_RX_N_IPAD,
input SYSCLOCK_P_IPAD,
input SYSCLOCK_N_IPAD,
input REFCLK0_X0Y0_P_IPAD,
input REFCLK0_X0Y0_N_IPAD,
//Output Decalarations
output GTP0_X0_Y0_TX_P_OPAD,
output GTP0_X0_Y0_TX_N_OPAD,
output GTP1_X0_Y0_TX_P_OPAD,
output GTP1_X0_Y0_TX_N_OPAD
);
//local signals declaration
wire refclk0_x0y0_i;
wire ibert_sysclock;
wire [35:0] CONTROL0;
// Ibert Core Wrapper Instance
S6chipscope_ibert U_S6CHIPSCOPE_IBERT
(
.GTP0_X0_Y0_TX_P_OPAD(GTP0_X0_Y0_TX_P_OPAD),
.GTP0_X0_Y0_TX_N_OPAD(GTP0_X0_Y0_TX_N_OPAD),
.GTP1_X0_Y0_TX_P_OPAD(GTP1_X0_Y0_TX_P_OPAD),
.GTP1_X0_Y0_TX_N_OPAD(GTP1_X0_Y0_TX_N_OPAD),
.GTP0_X0_Y0_RX_P_IPAD(GTP0_X0_Y0_RX_P_IPAD),
.GTP0_X0_Y0_RX_N_IPAD(GTP0_X0_Y0_RX_N_IPAD),
.GTP1_X0_Y0_RX_P_IPAD(GTP1_X0_Y0_RX_P_IPAD),
.GTP1_X0_Y0_RX_N_IPAD(GTP1_X0_Y0_RX_N_IPAD),
.REFCLK0_X0Y0_I(refclk0_x0y0_i),
.CONTROL(CONTROL0),
.SYSCLOCK_I(ibert_sysclock)
);
chipscope_icon U_ICON
(
.CONTROL0(CONTROL0));
// GT Refclock Instances
IBUFDS U_TILE0_REFCLK0
(
.O(refclk0_x0y0_i),
.I(REFCLK0_X0Y0_P_IPAD),
.IB(REFCLK0_X0Y0_N_IPAD)
);
// Sysclock Source
IBUFDS U_SYSCLOCK_IBUFDS
(
.O(ibert_sysclock),
.I(SYSCLOCK_P_IPAD),
.IB(SYSCLOCK_N_IPAD)
);
endmodule
// Black box declaration
module S6chipscope_ibert
(
output GTP0_X0_Y0_TX_P_OPAD,
output GTP0_X0_Y0_TX_N_OPAD,
output GTP1_X0_Y0_TX_P_OPAD,
output GTP1_X0_Y0_TX_N_OPAD,
input GTP0_X0_Y0_RX_P_IPAD,
input GTP0_X0_Y0_RX_N_IPAD,
input GTP1_X0_Y0_RX_P_IPAD,
input GTP1_X0_Y0_RX_N_IPAD,
input REFCLK0_X0Y0_I,
inout [35:0] CONTROL,
input SYSCLOCK_I
);
endmodule
module chipscope_icon
(
inout [35:0] CONTROL0);
endmodule
ERROR:NgdBuild:604 - logical block 'U_S6CHIPSCOPE_IBERT' with type
'S6chipscope_ibert' could not be resolved. A pin name misspelling can cause
this, a missing edif or ngc file, case mismatch between the block name and
the edif or ngc file name, or the misspelling of a type name. Symbol
'S6chipscope_ibert' is not supported in target 'spartan6'.
ERROR:NgdBuild:604 - logical block 'U_ICON' with type 'chipscope_icon' could not
be resolved. A pin name misspelling can cause this, a missing edif or ngc
file, case mismatch between the block name and the edif or ngc file name, or
the misspelling of a type name. Symbol 'chipscope_icon' is not supported in
target 'spartan6'.
`timescale 1ns / 1ps
//***************************** Module ****************************
module example_S6chipscope_ibert
(
//Input Declarations
input GTP0_X0_Y0_RX_P_IPAD,
input GTP0_X0_Y0_RX_N_IPAD,
input GTP1_X0_Y0_RX_P_IPAD,
input GTP1_X0_Y0_RX_N_IPAD,
input SYSCLOCK_P_IPAD,
input SYSCLOCK_N_IPAD,
input REFCLK0_X0Y0_P_IPAD,
input REFCLK0_X0Y0_N_IPAD,
//Output Decalarations
output GTP0_X0_Y0_TX_P_OPAD,
output GTP0_X0_Y0_TX_N_OPAD,
output GTP1_X0_Y0_TX_P_OPAD,
output GTP1_X0_Y0_TX_N_OPAD
);
//local signals declaration
wire refclk0_x0y0_i;
wire ibert_sysclock;
wire [35:0] CONTROL0;
// Ibert Core Wrapper Instance
S6chipscope_ibert U_S6CHIPSCOPE_IBERT
(
.GTP0_X0_Y0_TX_P_OPAD(GTP0_X0_Y0_TX_P_OPAD),
.GTP0_X0_Y0_TX_N_OPAD(GTP0_X0_Y0_TX_N_OPAD),
.GTP1_X0_Y0_TX_P_OPAD(GTP1_X0_Y0_TX_P_OPAD),
.GTP1_X0_Y0_TX_N_OPAD(GTP1_X0_Y0_TX_N_OPAD),
.GTP0_X0_Y0_RX_P_IPAD(GTP0_X0_Y0_RX_P_IPAD),
.GTP0_X0_Y0_RX_N_IPAD(GTP0_X0_Y0_RX_N_IPAD),
.GTP1_X0_Y0_RX_P_IPAD(GTP1_X0_Y0_RX_P_IPAD),
.GTP1_X0_Y0_RX_N_IPAD(GTP1_X0_Y0_RX_N_IPAD),
.REFCLK0_X0Y0_I(refclk0_x0y0_i),
.CONTROL(CONTROL0),
.SYSCLOCK_I(ibert_sysclock)
);
chipscope_icon U_ICON
(
.CONTROL0(CONTROL0));
// GT Refclock Instances
IBUFDS U_TILE0_REFCLK0
(
.O(refclk0_x0y0_i),
.I(REFCLK0_X0Y0_P_IPAD),
.IB(REFCLK0_X0Y0_N_IPAD)
);
// Sysclock Source
IBUFDS U_SYSCLOCK_IBUFDS
(
.O(ibert_sysclock),
.I(SYSCLOCK_P_IPAD),
.IB(SYSCLOCK_N_IPAD)
);
endmodule
// Black box declaration
module S6chipscope_ibert
(
output GTP0_X0_Y0_TX_P_OPAD,
output GTP0_X0_Y0_TX_N_OPAD,
output GTP1_X0_Y0_TX_P_OPAD,
output GTP1_X0_Y0_TX_N_OPAD,
input GTP0_X0_Y0_RX_P_IPAD,
input GTP0_X0_Y0_RX_N_IPAD,
input GTP1_X0_Y0_RX_P_IPAD,
input GTP1_X0_Y0_RX_N_IPAD,
input REFCLK0_X0Y0_I,
inout [35:0] CONTROL,
input SYSCLOCK_I
);
endmodule
module chipscope_icon
(
inout [35:0] CONTROL0);
endmodule