Spartan 3AN prevent readback ?

J

Jon Elson

Guest
I am trying to prevent readback of the bit file from a
Spartan 3AN. I am using ise 10.1 (need to keep that
for a while to support some older devices). I looked
up how to do it in a Xilinx tutorial, but it doesn't seem
to work. They say to go into generate programming file/
properties/readback options, and set it for disable readback
and reconfiguration. I set this, regenerated the bit file,
but after programming the device with Impact, I can still
verify the config. I'm assuming if you disable readback,
you can no longer verify the device, right?

I also tried all combinations in Impact, which are
data protect and data lockdown, these didn't seem to
prevent verify, either.

(I did a separate verify AFTER the one done automatically
when programming, presumably the read protect would be
set after the initial verify.)

Anyone been able to do this and know what I missed?

Thanks,

Jon
 
Jon Elson wrote:

I am trying to prevent readback of the bit file from a
Spartan 3AN.
One additional tidbit of info, if you read the bitgen
report, it shows Readback as (Not Specified)*
so it looks like the GUI system is not passing the
disable readback requirement to bitgen.

Do I have to run bitget from the command line?
I've never done that before.

Thanks,

Jon
 
On Thu, 09 Aug 2012 23:39:44 -0500, Jon Elson wrote:

Jon Elson wrote:

I am trying to prevent readback of the bit file from a Spartan 3AN.

One additional tidbit of info, if you read the bitgen report, it shows
Readback as (Not Specified)*
so it looks like the GUI system is not passing the disable readback
requirement to bitgen.
Quite possible.

Do I have to run bitget from the command line?
I've never done that before.
Worth learning how.

After using it in GUI, there should be a "command log" file (apologies
for vagueness, it's been a while since I used 10.x) in the project
folder. This will contain the command lines generated by the GUI. You can
use these as a starting point and add the flags you need in a text editor.

http://forums.xilinx.com/t5/Hierarchical-Design/bitgen-command-line-vs-
documentation/td-p/94148
may be useful. There is a link there to more documentation.

http://www.xilinx.com/support/documentation/sw_manuals/xilinx13_3/
devref.pdf
is the right manual for the wrong ISE version but there ought to be a
devref.pdf in the "docs" folder of your installation.

Having started this route, you may find it easy to write a shell script
(batch file if you're still using Windows) to repeat a complex series of
commands such as rebuilding a stable design.

I still use the GUI for experiments, new designs, until they are
reasonably stable, then create a shell script for consistency.

- Brian
 
Brian Drummond wrote:


After using it in GUI, there should be a "command log" file
Yes, I've got this in the bitgen report, it is 6 lines long
with TONS of switches. Well, I'll try it. But, is it true
that bitgen is where the bitfile protection is controlled for
the Spartan 3AN with Impact? With CPLDs, it is an option
in Impact.

Thanks,

Jon
 
Jon Elson wrote:
Brian Drummond wrote:


After using it in GUI, there should be a "command log" file
Yes, I've got this in the bitgen report, it is 6 lines long
with TONS of switches. Well, I'll try it. But, is it true
that bitgen is where the bitfile protection is controlled for
the Spartan 3AN with Impact? With CPLDs, it is an option
in Impact.

Thanks,

Jon
Are you talking about reading back the bitstream from the FPGA
or from the attached SPI flash? I was under the impression that
bitgen only controls whether you can read back the bitstream
from the FPGA itself. If you use the SPI flash embedded in the
Spartan 3AN, then I'm pretty sure anyone can read it back.

-- Gabor
 
Gabor wrote:


Are you talking about reading back the bitstream from the FPGA
or from the attached SPI flash? I was under the impression that
bitgen only controls whether you can read back the bitstream
from the FPGA itself. If you use the SPI flash embedded in the
Spartan 3AN, then I'm pretty sure anyone can read it back.
Assuming this is possible, what I want to do is prevent readback
of the internal flash memory of the Spartan 3AN. So, yes, I guess
I want to prevent readback from EITHER the live FPGA config OR
the flash memory inside the chip.

I thought this was possible, but further reading of Xilinx docs
just gets me confused. Well, it is not a critical situation, but
I did want to protect my little bit of IP if it just required
clicking a button on the GUI or so.

Jon
 

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