S
Sushmita
Guest
Hello All,
I am a student in India .......
I have few queries regarding Sparatan 2 FPGA. demo board...
1) I am using a spartan 2 demo board from Insight ... I did implement
a design that use block rams on my circuit . i need to read back the
contents of block ram after the operation to verify my design. I am
trying to perform readback using hardware debugger with xchecker
cable. I have included the capture block in my design and also proerly
aplied the clock signal and cap signal .. but my readback gives me an
error ..." Readback data conatins all '1' , verify if rt/rd are
connected and readbcak is enable" I have enabled readback and clock
as CCLK during configuration. Mode is set to slave serial and m0,m1,m2
pins are made floating(no pullup)
2) I want to know if it is possible to use xchecker cable on
spartan-ii board or is multilinx a must ... i have been able to
properly configure using xchecker but couldnt readback .. that may be
bcos multlinix in slave serial uses same configuration for
configuaring device ....
3) To which fpga pins are rt/rd pins of xchecker cable connected ...
On xc4000 i belive rt/rd are multiplex with m0/m1 pin .. I have
verified using multimeter ... that rt/rd is not connceted to m0/m1 for
Sparartan 2 demo board.
4) Is there any CAD tools support for generating test vectors( esp
Delay Faults ) for Sparatan2 FPGA or any form of fault model is
availble for SParatan 2 FPGA.
Thanking all in anticipation
Sushmita
I am a student in India .......
I have few queries regarding Sparatan 2 FPGA. demo board...
1) I am using a spartan 2 demo board from Insight ... I did implement
a design that use block rams on my circuit . i need to read back the
contents of block ram after the operation to verify my design. I am
trying to perform readback using hardware debugger with xchecker
cable. I have included the capture block in my design and also proerly
aplied the clock signal and cap signal .. but my readback gives me an
error ..." Readback data conatins all '1' , verify if rt/rd are
connected and readbcak is enable" I have enabled readback and clock
as CCLK during configuration. Mode is set to slave serial and m0,m1,m2
pins are made floating(no pullup)
2) I want to know if it is possible to use xchecker cable on
spartan-ii board or is multilinx a must ... i have been able to
properly configure using xchecker but couldnt readback .. that may be
bcos multlinix in slave serial uses same configuration for
configuaring device ....
3) To which fpga pins are rt/rd pins of xchecker cable connected ...
On xc4000 i belive rt/rd are multiplex with m0/m1 pin .. I have
verified using multimeter ... that rt/rd is not connceted to m0/m1 for
Sparartan 2 demo board.
4) Is there any CAD tools support for generating test vectors( esp
Delay Faults ) for Sparatan2 FPGA or any form of fault model is
availble for SParatan 2 FPGA.
Thanking all in anticipation
Sushmita