solder paste offset from pads

W

Winfield Hill

Guest
While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.


--
Thanks,
- Win
 
On 4/29/19 8:11 AM, Winfield Hill wrote:
While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.

It's probably to improve the self-centring. The surface tension of the
solder fillet produces a restoring force that is (iirc) cubic in the
displacement. Displacing the pads a bit makes the force linear in
displacement, which improves the self-centring.

Back when I was doing on-chip optical communication, we had various
schemes for doing that sort of thing, including different melting
points, offset pads, and so on.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC / Hobbs ElectroOptics
Optics, Electro-optics, Photonics, Analog Electronics
Briarcliff Manor NY 10510

http://electrooptical.net
https://hobbs-eo.com
 
Winfield Hill <hill@rowland.harvard.edu> wrote in news:qa6plk014q2
@drn.newsguy.com:

While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.

It appears that it wants you to have pad area outside the chip
package perimeter to allow proper wicking of the solder and for
inspection of the joint (in the 63/37 days we actually inspected
joint quality). It is very similar to the old "castle" dual flat
pack design configuration some old ceramic chip carriers had. It
was little sculpted cups at the edge that extended vertically on the
chip. Like little vias that got cut in half.

You could make a PCB to mount the DFN device onto and then mount
that to the main PCB assembly as a daughterboard, making it far
easier to service or adapt a newer version to. The footprint is
almost the same as far as real estate taken up. Actually being a
daughterboard suspended above the main, that real estate could be
recovered for more parts to be placed under this module.
 
Phil Hobbs wrote...
On 4/29/19 8:11 AM, Winfield Hill wrote:
While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 to 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.

It's probably to improve the self-centering. [snip]

Yes, makes sense. They also want the paste aperture
inside for the thermal pad. I made the pad in four
0.6 x 0.8mm sections, per other vendor suggestions.
I couldn't get Altium to let me specify these things,
so made each layer (pad, solder mask, paste aperture)
separately, differently for the pins and thermal pad.
I'd like to know what I'm doing with this weird stuff.


--
Thanks,
- Win
 
Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> wrote in
news:-vOdnRrOWZwdZlvBnZ2dnUU7-R3NnZ2d@supernews.com:

On 4/29/19 8:11 AM, Winfield Hill wrote:
While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.



It's probably to improve the self-centring. The surface tension
of the solder fillet produces a restoring force that is (iirc)
cubic in the displacement.

Absolutely correct. At the moment of reflow, both molten solder
and flux present will self center some devices and form perfect
solder joints if the stencil was not too thick.

Displacing the pads a bit makes the
force linear in displacement, which improves the self-centring.

That fillet of solder uses that force to do just that. Without
the offset, their is no fillet to tug on the device, and the chip
actually ends up on top of a set of solder 'pillows' (can't call
them balls as that term is specific), that typically would be a fail
on inspection as one cannot guarantee that all pads got 'pillows'
under them.

Back when I was doing on-chip optical communication, we had
various schemes for doing that sort of thing, including different
melting points, offset pads, and so on.

Can't beat 63/37. Those days are gone though. Tin alloy solder
joints all look very grainy and they had to change the entire IPC
acceptance spec to handle the stupid RoHS switch European paranoids
placed on the world. Failed satellites and who knows what else
later, and they still haven't figured out that the metallic form
lead in a 63/37 alloy solderd PCB assembly does NOT leach out into
ANYTHING, much less the water table.

Go to any of hundreds of outdoor firing ranges and find a
gazillion lead slugs in the ground, yet no rise in local water table
lead values.


But yeah... You hit it dead on. SMD technology design parameters
were all about self centering using the surface tension... The RoHS
came along and tin alloys do not flow anywhere near as well as the
63/37 we spent years declaring was the best. So the self centering
thing may not even work very well at all any more.
 
DecadentLinuxUserNumeroUno@decadence.org wrote...
You could make a PCB to mount the DFN device onto
and then mount that to the main PCB assembly as a
daughterboard, making it far easier to service or
adapt a newer version to. ...

Hah, my board only has three small sensors, plus
a few caps and resistors, so it is the "main PCB".


--
Thanks,
- Win
 
On Mon, 29 Apr 2019 13:49:56 +0000 (UTC),
DecadentLinuxUserNumeroUno@decadence.org wrote:

Winfield Hill <hill@rowland.harvard.edu> wrote in news:qa6plk014q2
@drn.newsguy.com:

While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.


It appears that it wants you to have pad area outside the chip
package perimeter to allow proper wicking of the solder and for
inspection of the joint (in the 63/37 days we actually inspected
joint quality). It is very similar to the old "castle" dual flat
pack design configuration some old ceramic chip carriers had. It
was little sculpted cups at the edge that extended vertically on the
chip. Like little vias that got cut in half.

You could make a PCB to mount the DFN device onto and then mount
that to the main PCB assembly as a daughterboard, making it far
easier to service or adapt a newer version to. The footprint is
almost the same as far as real estate taken up. Actually being a
daughterboard suspended above the main, that real estate could be
recovered for more parts to be placed under this module.

I do that with the EPC GaN fets, tiny BGAs, because they are very
fragile and very difficult to rework. The baby boards become
throwaways.


https://www.dropbox.com/s/q81306jpbndwnmw/T52C_Glob.JPG?dl=0

https://www.dropbox.com/s/tmrhwzeuuz3g7f1/T577_panel_back.JPG?dl=0


--

John Larkin Highland Technology, Inc

lunatic fringe electronics
 
Winfield Hill <hill@rowland.harvard.edu> wrote in news:qa730901io0
@drn.newsguy.com:

DecadentLinuxUserNumeroUno@decadence.org wrote...

You could make a PCB to mount the DFN device onto
and then mount that to the main PCB assembly as a
daughterboard, making it far easier to service or
adapt a newer version to. ...

Hah, my board only has three small sensors, plus
a few caps and resistors, so it is the "main PCB".

Heheheh... I see (e few things and only a few things) said the blind
man...


I saw one with a fool bore cpu next to it on their site.
 
John Larkin <jjlarkin@highlandtechnology.com> wrote in
news:p25ece91gnbfat7u1f0oqmuno663fcak2u@4ax.com:

On Mon, 29 Apr 2019 13:49:56 +0000 (UTC),
DecadentLinuxUserNumeroUno@decadence.org wrote:

Winfield Hill <hill@rowland.harvard.edu> wrote in news:qa6plk014q2
@drn.newsguy.com:

While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.


It appears that it wants you to have pad area outside the chip
package perimeter to allow proper wicking of the solder and for
inspection of the joint (in the 63/37 days we actually inspected
joint quality). It is very similar to the old "castle" dual flat
pack design configuration some old ceramic chip carriers had. It
was little sculpted cups at the edge that extended vertically on
the
chip. Like little vias that got cut in half.

You could make a PCB to mount the DFN device onto and then mount
that to the main PCB assembly as a daughterboard, making it far
easier to service or adapt a newer version to. The footprint is
almost the same as far as real estate taken up. Actually being a
daughterboard suspended above the main, that real estate could be
recovered for more parts to be placed under this module.

I do that with the EPC GaN fets, tiny BGAs, because they are very
fragile and very difficult to rework. The baby boards become
throwaways.


https://www.dropbox.com/s/q81306jpbndwnmw/T52C_Glob.JPG?dl=0

https://www.dropbox.com/s/tmrhwzeuuz3g7f1/T577_panel_back.JPG?dl=0

Those look good. You could use large vias and post pins to solder
it down and actually get some heat transfer through them. A tiny
bit less easily servicable but still easier to swap than right on
the board, just like you say.

But since they are baby boards, it would also be easy to reflow it
and wipe the parts and reuse the board. Smaller carbon footprint
and all that. Not on a customer repair though.
 
On Mon, 29 Apr 2019 18:09:46 +0000 (UTC),
DecadentLinuxUserNumeroUno@decadence.org wrote:

John Larkin <jjlarkin@highlandtechnology.com> wrote in
news:p25ece91gnbfat7u1f0oqmuno663fcak2u@4ax.com:

On Mon, 29 Apr 2019 13:49:56 +0000 (UTC),
DecadentLinuxUserNumeroUno@decadence.org wrote:

Winfield Hill <hill@rowland.harvard.edu> wrote in news:qa6plk014q2
@drn.newsguy.com:

While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.


It appears that it wants you to have pad area outside the chip
package perimeter to allow proper wicking of the solder and for
inspection of the joint (in the 63/37 days we actually inspected
joint quality). It is very similar to the old "castle" dual flat
pack design configuration some old ceramic chip carriers had. It
was little sculpted cups at the edge that extended vertically on
the
chip. Like little vias that got cut in half.

You could make a PCB to mount the DFN device onto and then mount
that to the main PCB assembly as a daughterboard, making it far
easier to service or adapt a newer version to. The footprint is
almost the same as far as real estate taken up. Actually being a
daughterboard suspended above the main, that real estate could be
recovered for more parts to be placed under this module.

I do that with the EPC GaN fets, tiny BGAs, because they are very
fragile and very difficult to rework. The baby boards become
throwaways.


https://www.dropbox.com/s/q81306jpbndwnmw/T52C_Glob.JPG?dl=0

https://www.dropbox.com/s/tmrhwzeuuz3g7f1/T577_panel_back.JPG?dl=0



Those look good. You could use large vias and post pins to solder
it down and actually get some heat transfer through them. A tiny
bit less easily servicable but still easier to swap than right on
the board, just like you say.

But since they are baby boards, it would also be easy to reflow it
and wipe the parts and reuse the board. Smaller carbon footprint
and all that. Not on a customer repair though.

The mouse-bite boards solder down as surface-mount parts

https://www.dropbox.com/s/93cuoljq6z8z9yc/DSC02362.JPG?dl=0

(the ones in that pic are not glob-topped)

and transfer heat fairly well. We hand-solder these.

We have a Metcal tweezer sort of thing that can pluck a baby board
right off.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
 
Don't worry about it:
1. The mask fab will do the most obvious things themselves (e.g., break
large regions into grids). Also typical is making a dogbone or chevron
shape for bigger chips (0805+).

1a. Unless you're starting up your own assembly house, expect to do a lot of
rework anyway. Pasting saves time over 100% hand soldering, but don't
expect it to be perfect your first time, or even your 100th time.

In short, without having any existing process control to speak of, you
aren't going to save much time doing tweaks on the front end -- in
particular, you won't have any chance to feed changes back into the process.

I'm assuming this is a one-off sort of thing, hence why it hasn't come up
before, and may not come up again (but, again again, if you _are_ starting
up an assembly house--).

2. A CM will already have their process dialed in, so will make tweaks to
the paste layer to their satisfaction (if you provide a modified paste
layer, they'll probably just regenerate it from pads, using their own rules
and geometry?).

Concentrate more on getting the pads IPC-compliant. You'll see all sorts of
bizarre footprint dimensions in datasheets, but IPC rules exist because they
give consistent results.

On that note, some packages are ridiculously loose. JEDEC packages in
particular. TO-220 is awful, sure, but DO-214 is as well. Most
manufacturers give a footprint that's closer to an IPC "high density"
(reduced outline) footprint, but which violates (according to IPC rules) the
very drawing they give. Because, of course they give the JEDEC DO-214 with
its shitty tolerances, why give the internal drawing with correct
tolerances? But they give the footprint from it. So, presumably, you can
infer some dimensions of that drawing with modest confidence, based on their
footprint. From this, you can draw a regular IPC footprint, of whatever
"density" you like.

Again, feedback is possible (maybe the ideal pads are slightly different,
for various reasons), but only if you have a closely coupled process.

Another note, don't be afraid to shave pad widths. Some TSSOP, MSOP, etc.
have suspiciously wide pins, for which you can't possibly have positive side
fillet AND soldermask between pads. The IPC tolerance for side fillet
is -0.03mm so a little pad shaving is perfectly acceptable. For 0.5mm
pitch, 0.22 to 0.25mm width pads usually leave enough space for soldermask,
assuming 3-4 mil minimum web width, and 2-3 mil soldermask expansion.
Correct soldermask is best; but if you can't manage it, no soldermask is
better than too-thin webs flaking off, adhering to pads and causing open
joints.

IPC-7351 is available for free and isn't much different from the latest
version, at least in terminology and rough values. You can usually find
copies of such documents floating around on suspiciously-public websites,
indexes or FTPs; give it a quick search.

Tim

--
Seven Transistor Labs, LLC
Electrical Engineering Consultation and Design
Website: https://www.seventransistorlabs.com/

"Winfield Hill" <hill@rowland.harvard.edu> wrote in message
news:qa6plk014q2@drn.newsguy.com...
While making a DFN footprint landing pattern for a
Sensirion SGP30 Gas Platform sensor, I encountered
these instructions.

"It is recommended to design the solder mask as a
Non-Solder Mask Defined (NSMD) type. For solder
paste printing a laser-cut, stainless steel stencil
is recommended, with electro-polished trapezoidal
walls and with 0.125 to 0.150 mm stencil thickness.
The length of the stencil apertures for the I/O
pads should be the same as the PCB pads. However,
the position of the stencil apertures should have
an offset of 0.1 mm away from the package center,
as indicated in Figure 12. The die pad aperture
should cover 70 – 90 % of the die pad area,
resulting in a size of about 1.05 mm x 1.5 mm."

A datasheet drawing clearly shows the offset.
The stencil paste aperture is the same size as
the pad, but appears to fit within the mask.

The TI document SLUA271B doesn't mention offsets.
I see the IPC-7351B standard costs $160, but not
sure if it'd be helpful for specialized sensors.


--
Thanks,
- Win
 

Welcome to EDABoard.com

Sponsor

Back
Top