Software Reset with Virtex4's PowerPC and XilKernel

[Closter]

Hi,

In my design, I use a embedded PowerPC (on a virtex4 Fx20). I use
the Xilkernel OS provided by Xilinx.

I try to implement a software reset on my design, but I don't find
solution.

Did someone has already do that ?

Thanks.

 

[JK]

On Jul 31, 8:52 pm, Closter <yannick.ab...@gmail.com> wrote:

Hi,

In my design, I use a embedded PowerPC (on a virtex4 Fx20). I use
the Xilkernel OS provided by Xilinx.

I try to implement a software reset on my design, but I don't find
solution.

Did someone has already do that ?

Thanks.

Closter, Please post this question in comp.lang.fpga forum.
You will get quick replies.

Regards,
JK