SoC Encounter

[luc]

Hi,

If you start with P&R (SoC Encounter) you have to read a verilog
netlist.
Most of the time this netlist doesn't contain any Power/Ground pads.
How is it possible to create P/G + Corners in the IO-placement file
and distribute the create cells around the chip.


Many thanks

luc

 

[Paul Muller]

Hi Luc,

before reading the IOC file, you must first read the verilog file, the a
DEF file which contains all information about corner and PG cells.

You can find the syntax in the SoCE documentation.

Paul

 

[Luc Folens]

Hi Paul,

I'm using SoC Encounter version "v03.10-s036_1"
and I read in my design with the command 'Design Import' (specify all LEF,
LIB files but also IOplacement file).
Only if I specify P/G pads in the verilog netlist these appears in the
IOring around the core, but I don't want to define
P/Gpads in the verilog file . How is it possible to create P/G-pads, do you
have to do it in the IO placement file, I cannot
find the syntax in the manual.

I'm using the following syntax for IOplacement file :
Version: 2

Pad: iio_pad_ring/pad_clk_in N
Pad: iio_pad_ring/pad_muxmod_0 N
Pad: iio_pad_ring/pad_muxmod_1 N
Pad: iio_pad_ring/pad_muxmod_2 N
Pad: iio_pad_ring/pad_reset_n N
Pad: iio_pad_ring/pad_cpu_intr_0 N
Pad: iio_pad_ring/pad_dsp_intr_0 N
Pad: iio_pad_ring/pad_cpu_intr_1 N

Regards

luc






"Paul Muller" <paul.muller-at-epfl.ch> wrote in message
news:40a48876$1@epflnews.epfl.ch...

Hi Luc,

before reading the IOC file, you must first read the verilog file, the a
DEF file which contains all information about corner and PG cells.

You can find the syntax in the SoCE documentation.

Paul

 

[Paul Muller]

Hi Luc,

I must admit I did not go yet that far in the use of SoCE and I guessed
it was the same than for SE. That's where my first explanation came
from. But apparently it's not.

I had a look at the documentation. Did you try to use the
Power - Edit Pad Location menu? The power pad locations should be
defined in a .pp file as described in the documentation in chapter 16,
Running Power Analysis.

Please give feed-back on this solution.

Paul