SKILL: How to rename a pin in Layout?

[Min Ting]

Hi everyone,

I am trying to rename the "vdd" pin to "vdd!" in order to match with
the schematic to pass LVS.

With the function below there is one interesting thing that the net
name of the terminal is not changed with the code but only the
terminal name is changed.

However, if I manually edited the terminal name once, then use the
code to change the terminal name and merge the net, both the terminal
name and net name would be changed. Could you give me some idea why
this is happening?

By only changing the terminal name without merging the net, the LVS
does not complain, I am wondering what would be the issue if I only
change the terminal name without merging the net.

I am wondering what is the purpose for using the rexCompile function
to compile the pattern and what would happen if I directly assign a
new name to the terminal (i.e. term~>name = "newTerm")?


/* abReplaceTermNames.il

Author A.D.Beckett
Group Custom IC (UK), Cadence Design Systems Ltd.
Language SKILL
Date Jun 26, 2007
Modified
By

Function to replace a substring in a terminal - uses regular
expression functions. For more details, see the comments below,
but:

abReplaceTermNames(cvId "from" "to")

is a typical usage.

***************************************************

SCCS Info: @(#) abReplaceTermNames.il 06/26/07.13:26:16 1.1

*/

/******************************************************************
* *
* abReplaceTermNames(cvId pattern replace @optional (index 1)) *
* *
* Look for any terminal names in the view with a name which *
* matches the regular expression pattern. When found, replace *
* the matching pattern with the string replace. Normally it *
* will replace the first occurrence, but that can be changed with *
* the optional index argument. Returns t if anything was changed. *
* *
******************************************************************/

procedure(abReplaceTermNames(cvId pattern replace @optional (index 1))
let((existTerm newName newNet changed)
rexCompile(pattern)
foreach(term cvId~>terminals
when(rexExecute(term~>name)
newName=rexReplace(term~>name replace index)
existTerm=dbFindTermByName(cvId newName)
if(existTerm then
warn("Cannot rename %s to %s as terminal already exists with
that name" term~>name newName)
else
;----------------------------------------------------
; Update the name, and update the net too
; (by creating a new one and merging it)
;----------------------------------------------------
term~>name=newName
newNet=dbMakeNet(cvId newName)
dbMergeNet(newNet term~>net)
;----------------------------------------------------
; Then update any labels attached to pin figures;
; textDisplays will be updated automatically, so it's
; only conventional labels we need to worry about
;----------------------------------------------------
foreach(pin term~>pins
foreach(child pin~>fig~>children
when(child~>objType=="label"
child~>theLabel=
rexReplace(
child~>theLabel
replace
index
)
) ; when label
) ; foreach child
) ; foreach pin
changed=t
) ; if
) ; when
) ; foreach
changed
) ; let
) ; procedure

Thanks and regards,

Min

 

[Riad KACED]

Hi Min,

Although I could answer the above questions, I'll let Andew replying
as he is the author of the code.
I have one concern though : Why do you want to do this ? This is not a
good idea in your particular case I'm afraid.
the VDD! in your schematic is a global net. This is a logical notion
that does not make any sens in a physical layout.
Instead of running LVS at this cell level, I would advise you creating
a Top level where you instantiate the symbol of your schematic. You
have then to define a netSet on your symbol with the right property
name/value. Create the top level pins and then create the layout. This
way your LVS would pass ... fingers in the nose !

Regards,
Riad.

 

[Andrew Beckett]

Min Ting wrote, on 09/04/09 21:25:

Hi everyone,

I am trying to rename the "vdd" pin to "vdd!" in order to match with
the schematic to pass LVS.

With the function below there is one interesting thing that the net
name of the terminal is not changed with the code but only the
terminal name is changed.

However, if I manually edited the terminal name once, then use the
code to change the terminal name and merge the net, both the terminal
name and net name would be changed. Could you give me some idea why
this is happening?

By only changing the terminal name without merging the net, the LVS
does not complain, I am wondering what would be the issue if I only
change the terminal name without merging the net.

I am wondering what is the purpose for using the rexCompile function
to compile the pattern and what would happen if I directly assign a
new name to the terminal (i.e. term~>name = "newTerm")?


.... code snipped for brevity ...
Thanks and regards,

Min

I can't see why this would happen - I'd probably have to see the database which
had the problem to figure it out.

The rex stuff is just to allow the terminal name to be specified as a regular
expression. This is to allow you to replace part of a terminal name with
something else. So that's unlikely to be the problem, because in practice once
the newName has been determined in the code, it just does term~>name=newName.

Note it is also perfectly legal to have a net name different from the terminal
name - so it shouldn't actually cause any problems if this happens.

But I also take Riad's point in his reply - it's better to avoid global names in
the schematic. There's no such thing as a "global" in layout anyway...

Regards,

Andrew.