size of file

T

terabits

Guest
hi

can some one tell me how to find size of a file from verilog.

my requirement is to pass the size of the file to a script so that it
can compare, instead of passing number of lines for each test case,
which differ for each case.

c is ruled out as i run this on arm processor, it will not take c file
commands

regards
 
On Wed, 26 Dec 2007 11:14:10 -0800 (PST),
terabits <tera.bits@gmail.com> wrote:

can some one tell me how to find size of a file from verilog.

my requirement is to pass the size of the file to a script so that it
can compare, instead of passing number of lines for each test case,
which differ for each case.

c is ruled out as i run this on arm processor, it will not take c file
commands
[and in a follow-up]
Here size means the number of lines
I'm really confused here. I find it hard to believe you're
running your Verilog simulator on an ARM processor, for one
thing. And if you have a script that needs to know the
size of a file, get the script to find out - scripting
languages are good at that sort of thing.

The direct answer to your first question is: use the
Verilog file I/O system functions such as $ftell.

integer file_id, position, result;
...
// Open the file
file_id = $fopen("my_file", "r");
if (file_id == 0) begin
$display("oops, can't open file");
$stop;
end
//
// Position the file pointer at end of file
result = $fseek(file_id, 0, 2);
if (result == -1) begin
$display("oops, can't move file pointer");
$stop;
end
//
// Discover where it is
result = $ftell(file_id);
$display("File has %0d bytes", result);
...

Depending on your operating system and simulator,
it's possible you may need to open the file in "rb"
mode instead of "r" mode in order to get the $fseek
mechanism to work.

For your follow-up question, I don't know of any
direct way to measure the number of lines in a file.
Instead, use repeated calls to $fgets to read lines
(into a dummy variable) until you reach end-of-file,
counting the lines as you go.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
I'm really confused here. I find it hard to believe you're
running your Verilog simulator on an ARM processor, for one
thing. And if you have a script that needs to know the
size of a file, get the script to find out - scripting
languages are good at that sort of thing.
I am guessing here, but I believe the guy is using the ARM chip as an early
proto-typing tool. In the past my company had a piece of code as part of
our product that would take synthesizable RTL and convert it to a C object
that could be executed on a PowerPC processor. Since it had a C code
generation step the same routines could have been used to compile for an ARM
chip as opposed to thee PowerPC processor.

If he is indeed mapping the RTL code to C code and compiling, he could
actually hook in C API calls to check the file size. We did something very
similar to this to create a synthesizable test bench.

We were trying to create a way to speed up test benches, in the end the
speed up versus compile time was no enough to continue the project.
 

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