A
Ashutosh Chakraborty
Guest
Ciao,
Just a quick question. Does SIS support cyclic netlist? I remember
once I tried to model a back to back inverter pair but I had issues
when I tried to read_blif the file. So I assumed it does not do it.
Now I am working on a design which has a feedback loop and I see that
SIS does read the file using read_blif without any errors.
-regards,
Ashutosh
Just a quick question. Does SIS support cyclic netlist? I remember
once I tried to model a back to back inverter pair but I had issues
when I tried to read_blif the file. So I assumed it does not do it.
Now I am working on a design which has a feedback loop and I see that
SIS does read the file using read_blif without any errors.
-regards,
Ashutosh