Simulation Data extraction

[vikramts]

Hello

I would like to make plots of variables used in my codes and I realise
that Verilog-AMS only provides transient analysis. I figured it would make
sense to try and sample some points and store values in a text file or
something,which I could use in Matlab or Excel.

Can someone tell me how I should do this?Are tere any tools in SimVision
for Verilog-AMS for this purpose?I have tried using $fopen,$fdisplay but I
am not able to understand the proper method of usage.

Any help/source references would be greatly appreciated!Beginner in
Verilog-AMS and SimVision here!!!!

-Vikram

 

[vikramts]

Hi Jason

Does simulation data get written to verilog.log even if you are using a
code in Verilog-AMS and compiling it through SimVision(instead of
NCVerilog)?

 

Hi Jason

Does simulation data get written to verilog.log even if you are using a
code in Verilog-AMS and compiling it through SimVision(instead of
NCVerilog)?

 

[Jason Zheng]

vikramts wrote:

Hi Jason

Does simulation data get written to verilog.log even if you are using a
code in Verilog-AMS and compiling it through SimVision(instead of
NCVerilog)?



Regardless of the simulator/compiler choice, you specify the name of the

log file through some simulator option. Some have a default log file,
and the names are likely to differ. Your best bet is to find out what
simulator option is to specify the log file and then use that option to
run the simulator.

-jz

 

Hi.

You could try this:

integer rslts;

// open results file, write header
rslts=$fopen("tb_results.txt"); // Name of text file.
$fdisplay(rslts, "testbench results"); // Text File Header.
$fdisplay(rslts);
$fwrite(rslts, "\n"); // Insert blank line.

// Format data.
$fdisplay(rslts, "\t%s\t%s", "address", "data"); // Setup header.
$fdisplay(rslts, "\t%h\t%h", addr_for, data_out); // Write Data.

Hope this helps,

Jeremy

vikramts wrote:

Hello

I would like to make plots of variables used in my codes and I
realise
that Verilog-AMS only provides transient analysis. I figured it would
make
sense to try and sample some points and store values in a text file
or
something,which I could use in Matlab or Excel.

Can someone tell me how I should do this?Are tere any tools in
SimVision
for Verilog-AMS for this purpose?I have tried using $fopen,$fdisplay
but I
am not able to understand the proper method of usage.

Any help/source references would be greatly appreciated!Beginner in
Verilog-AMS and SimVision here!!!!

-Vikram

 

[vikramts]

Hi Jeremy

Ok,this might sound elementary...but I did try the code you gave,and I am
able to write into my file.Now how can I get data points from the
simulations that I run using SimVision(for Verilog-AMS)?

In other words,how do I sample the waveform at certain points and get a
table of values of all quantities(eg:voltage,current) versus time(so that
i can make plots of voltage1 vs current or voltage2 vs voltage1 etc etc)?

 

Perhaps something like

forever
#delay $fdisplay(rslts, "%t %h %h", $time, voltage, current);
Where delay is the desired time between data points.

 

[vikramts]

Hey!

It worked!Thanks so much!That was really helpful!
Does the Cadence-AMS Simulator have an option to make plots of chosen
variables?Or is it advisable to use the extracted data in another graphing
tool?

Vikram

 

[Jason Zheng]

vikramts wrote:

Hello

I would like to make plots of variables used in my codes and I realise
that Verilog-AMS only provides transient analysis. I figured it would make
sense to try and sample some points and store values in a text file or
something,which I could use in Matlab or Excel.

Can someone tell me how I should do this?Are tere any tools in SimVision
for Verilog-AMS for this purpose?I have tried using $fopen,$fdisplay but I
am not able to understand the proper method of usage.

Any help/source references would be greatly appreciated!Beginner in
Verilog-AMS and SimVision here!!!!

-Vikram

You can simply use $monitoor or $display tasks to print to stdout, just

make sure every line that you print out has some unique identifier, such
as this:

checkpoint1: a = ... b = ...
checkpoint2: ...
....


then you can use a simple grep command to extract all those lines
(assuming your simulator's log file is verilog.log):

grep checkpoint verilog.log > checkpoints.txt

Ta-da!