Simulating Verilog-A model using spectre.

G

Gunnar Munder

Guest
You have to add the Verilog-A view to the switch view list in your
Analog Design Environment window under Setup->Environment Options. The
view list has to look like that: "spectre cmos_sch schematic
veriloga". Whatever view is found first - beginning from the left - is
gonna be used. Having a schematic and a veriloga view in one cell you
need to make sure the one you want to simulate is further left in the
view list.

Have fun
Gunnar
 
Thanks Svenn and Gunnar. It helped me solve this probelm.. Now I could
simulate my model..
 

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