A
analog
Guest
Hi all,
A circuit simulator oriented toward switching power conversion cannot
be considered complete without a non linear inductor model as part of
the package. This is absolutely vital for simulating the mundane such
as variations in core loss with operating conditions as well as the
more exotic such as magamps and ferroresonant transformers.
Toward this end I have recently been amusing myself trying to create
a good non linear inductor model for LTspice. As with other similar
models, it integrates inductor voltage and applies it to a bi-
directional zener like impedance to model saturation. In addition it
may have the following new(?) and useful features:
+ True dc and ac hysteresis effects
+ Options for modeling both round and square loop materials
(using fast LTspice specific features)
+ A simple way of modeling the addition of a core gap
+ Adjustable frequency dependent losses
Although the qualitative results of this model have a satisfying
look and feel about them, the model is preliminary and has not been
quantitatively verified. Also, I'm not sure what the friendliest
parameter format to present to the user would be (how best to
relate core and material parameters to input terminal parameters).
Should turns and core geometry be part of the model so that the
internal nodes proportional to B and H could be scaled and related
to material parameters (and be made available as outputs)?
Ideas, comments? -- analog
The LTspice file follows below (as usual, beware unintended word wrap):
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Version 4
SHEET 1 1044 680
WIRE -112 -80 -112 -176
WIRE -112 32 -112 0
WIRE -160 -64 -160 -112
WIRE -160 -112 -240 -112
WIRE -304 -112 -304 -80
WIRE -304 0 -304 32
WIRE -160 -16 -160 32
WIRE -240 32 -240 -16
WIRE -240 -80 -240 -112
WIRE -240 -112 -304 -112
WIRE -352 -16 -352 32
WIRE -352 32 -432 32
WIRE -352 -112 -432 -112
WIRE -352 -112 -352 -64
WIRE -432 -112 -464 -112
WIRE -432 32 -496 32
WIRE -432 32 -432 0
WIRE -432 -80 -432 -112
WIRE -768 48 -768 32
WIRE -768 -80 -768 -112
WIRE -768 32 -768 0
WIRE -736 -112 -768 -112
WIRE 0 -80 0 -112
WIRE 0 -112 16 -112
WIRE 224 -112 224 -64
WIRE 224 -16 224 32
WIRE 272 32 272 0
WIRE 144 32 144 -16
WIRE 144 -80 144 -112
WIRE 144 -112 224 -112
WIRE 432 -176 432 -80
WIRE 432 0 432 32
WIRE 432 -176 352 -176
WIRE -112 -176 -96 -176
WIRE -16 -176 144 -176
WIRE 272 -80 272 -176
WIRE 512 -176 512 -80
WIRE -704 -112 -736 -112
WIRE 0 32 0 0
WIRE 224 -176 272 -176
WIRE 272 -176 352 -176
WIRE 512 0 512 32
WIRE 112 -112 128 -112
WIRE -496 -80 -496 -112
WIRE -496 -112 -624 -112
WIRE -496 0 -496 32
WIRE -496 32 -768 32
WIRE 16 -112 32 -112
WIRE 128 -112 144 -112
WIRE 480 -176 512 -176
WIRE 352 -176 352 -80
WIRE 352 -16 352 32
WIRE -112 -176 -160 -176
WIRE -464 -112 -496 -112
WIRE 432 -176 480 -176
FLAG -464 -112 2
FLAG -768 48 0
FLAG -736 -112 1
FLAG -304 32 0
FLAG -240 32 0
FLAG -160 32 0
FLAG -112 32 0
FLAG 224 32 0
FLAG 144 32 0
FLAG 272 32 0
FLAG 432 32 0
FLAG 512 32 0
FLAG 0 32 0
FLAG 16 -112 3
FLAG 128 -112 4
FLAG 480 -176 5
FLAG 352 32 0
FLAG -160 -176 flux
IOPIN -160 -176 Out
SYMBOL g -304 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL cap -256 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 64 Left 0
WINDOW 39 32 28 Left 0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL e -112 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL voltage -112 -176 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 Invisible 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL f -432 -80 R0
WINDOW 0 16 0 Left 0
WINDOW 3 40 41 Left 0
WINDOW 123 16 80 Left 0
SYMATTR InstName F1
SYMATTR Value V1
SYMATTR Value2 1
SYMBOL voltage -768 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 48 72 Left 0
WINDOW 3 -48 176 Left 0
WINDOW 0 -42 57 Right 0
SYMATTR Value SINE(0 1 {f} 0 {-f/3} 90)
SYMATTR InstName Vs
SYMBOL g 272 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName G2
SYMATTR Value 50m
SYMBOL cap 128 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 64 Left 0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL h 0 -96 M0
WINDOW 0 16 16 Left 0
WINDOW 3 40 56 Left 0
WINDOW 123 16 96 Left 0
SYMATTR InstName H1
SYMATTR Value V1
SYMATTR Value2 1k
SYMBOL res 416 -96 R0
WINDOW 0 32 16 Left 0
WINDOW 3 32 96 Left 0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL ind -480 -96 M0
WINDOW 0 48 40 Left 0
WINDOW 3 48 72 Left 0
SYMATTR InstName L1
SYMATTR Value {100u*n}
SYMBOL res -720 -96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 240 -192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL Misc\\xvaristor 496 -96 R0
WINDOW 0 48 16 Left 0
WINDOW 3 48 48 Left 0
WINDOW 39 48 72 Left 0
WINDOW 40 48 96 Left 0
SYMATTR InstName X2
SYMATTR Value Rnd
SYMATTR SpiceLine v=3k
SYMATTR SpiceLine2 r=0
SYMBOL Misc\\xvaristor 128 -128 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
WINDOW 39 56 56 VTop 0
WINDOW 40 80 56 VTop 0
SYMATTR InstName X1
SYMATTR Value Rnd
SYMATTR SpiceLine v=100
SYMATTR SpiceLine2 r=3k
SYMBOL cap 336 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 64 Left 0
SYMATTR InstName C3
SYMATTR Value 5n
TEXT -816 200 Left 0 !.step param n list .1 1 1k
TEXT -312 88 Left 0 !.subckt Rnd 1 2 v=1 r=0\n.param n=v/.83-1\nE1 1 3 3 2 {max(n,0)}\nD1 2 3 rn\nD2 3 2 rn\n.model rn d(Is=1p Rs={r/n}) \n.ends Rnd
TEXT 128 88 Left 0 !.subckt Sqr 1 2 v=1 r=0\nD1 1 2 sq\n.model sq d(Vfwd={v} Vrev={v} Rs={r}) \n.ends Sqr
TEXT -816 232 Left 0 !.tran 0 {15/f} {1m/f} {1m/f} uic
TEXT -816 168 Left 0 !.param n=1 f=20k
TEXT -504 -176 VLeft 0 ;L1 models an air gap
TEXT -240 -232 VLeft 0 ;G1, C1, E1 models volt-sec\n applied to inductor
TEXT -424 -176 VLeft 0 ;F1, V1 reflects current resulting\n from applied volt-seconds
TEXT 520 -224 VLeft 0 ;X2 models saturation effects
TEXT -664 -176 VLeft 0 ;R1 models winding resistance
TEXT 432 -224 VLeft 0 ;R3 models low level\n linear inductance
TEXT 168 -240 VLeft 0 ;R2 models incremental\n saturation inductance
TEXT 48 -232 VLeft 0 ;H1, X1, C2, G2 models hysteresis\n effects (dc + ac widening)
TEXT 352 -224 VLeft 0 ;C3 models linear core loss
TEXT -80 -256 VLeft 0 ;V1 senses current drawn by\n applied volt-seconds
TEXT -112 -656 Bottom 0 ;Non Linear Inductor Model (Preliminary) by analog@ieee.org - 04/04\nfor B - H style curves plot V(flux) and change x-axis from time to I(R1)
TEXT 128 224 Left 0 ;Note: for abrupt limiting effects\nsubstitute "Sqr" subcircuit model
LINE Normal -56 -64 -56 -136 2
LINE Normal -272 -144 -368 -96 2
LINE Normal -144 -144 -272 -144 2
LINE Normal -384 -64 -368 -96 2
LINE Normal -96 -160 -144 -144 2
A circuit simulator oriented toward switching power conversion cannot
be considered complete without a non linear inductor model as part of
the package. This is absolutely vital for simulating the mundane such
as variations in core loss with operating conditions as well as the
more exotic such as magamps and ferroresonant transformers.
Toward this end I have recently been amusing myself trying to create
a good non linear inductor model for LTspice. As with other similar
models, it integrates inductor voltage and applies it to a bi-
directional zener like impedance to model saturation. In addition it
may have the following new(?) and useful features:
+ True dc and ac hysteresis effects
+ Options for modeling both round and square loop materials
(using fast LTspice specific features)
+ A simple way of modeling the addition of a core gap
+ Adjustable frequency dependent losses
Although the qualitative results of this model have a satisfying
look and feel about them, the model is preliminary and has not been
quantitatively verified. Also, I'm not sure what the friendliest
parameter format to present to the user would be (how best to
relate core and material parameters to input terminal parameters).
Should turns and core geometry be part of the model so that the
internal nodes proportional to B and H could be scaled and related
to material parameters (and be made available as outputs)?
Ideas, comments? -- analog
The LTspice file follows below (as usual, beware unintended word wrap):
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Version 4
SHEET 1 1044 680
WIRE -112 -80 -112 -176
WIRE -112 32 -112 0
WIRE -160 -64 -160 -112
WIRE -160 -112 -240 -112
WIRE -304 -112 -304 -80
WIRE -304 0 -304 32
WIRE -160 -16 -160 32
WIRE -240 32 -240 -16
WIRE -240 -80 -240 -112
WIRE -240 -112 -304 -112
WIRE -352 -16 -352 32
WIRE -352 32 -432 32
WIRE -352 -112 -432 -112
WIRE -352 -112 -352 -64
WIRE -432 -112 -464 -112
WIRE -432 32 -496 32
WIRE -432 32 -432 0
WIRE -432 -80 -432 -112
WIRE -768 48 -768 32
WIRE -768 -80 -768 -112
WIRE -768 32 -768 0
WIRE -736 -112 -768 -112
WIRE 0 -80 0 -112
WIRE 0 -112 16 -112
WIRE 224 -112 224 -64
WIRE 224 -16 224 32
WIRE 272 32 272 0
WIRE 144 32 144 -16
WIRE 144 -80 144 -112
WIRE 144 -112 224 -112
WIRE 432 -176 432 -80
WIRE 432 0 432 32
WIRE 432 -176 352 -176
WIRE -112 -176 -96 -176
WIRE -16 -176 144 -176
WIRE 272 -80 272 -176
WIRE 512 -176 512 -80
WIRE -704 -112 -736 -112
WIRE 0 32 0 0
WIRE 224 -176 272 -176
WIRE 272 -176 352 -176
WIRE 512 0 512 32
WIRE 112 -112 128 -112
WIRE -496 -80 -496 -112
WIRE -496 -112 -624 -112
WIRE -496 0 -496 32
WIRE -496 32 -768 32
WIRE 16 -112 32 -112
WIRE 128 -112 144 -112
WIRE 480 -176 512 -176
WIRE 352 -176 352 -80
WIRE 352 -16 352 32
WIRE -112 -176 -160 -176
WIRE -464 -112 -496 -112
WIRE 432 -176 480 -176
FLAG -464 -112 2
FLAG -768 48 0
FLAG -736 -112 1
FLAG -304 32 0
FLAG -240 32 0
FLAG -160 32 0
FLAG -112 32 0
FLAG 224 32 0
FLAG 144 32 0
FLAG 272 32 0
FLAG 432 32 0
FLAG 512 32 0
FLAG 0 32 0
FLAG 16 -112 3
FLAG 128 -112 4
FLAG 480 -176 5
FLAG 352 32 0
FLAG -160 -176 flux
IOPIN -160 -176 Out
SYMBOL g -304 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName G1
SYMATTR Value 1
SYMBOL cap -256 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 64 Left 0
WINDOW 39 32 28 Left 0
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL e -112 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName E1
SYMATTR Value 1
SYMBOL voltage -112 -176 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 -32 56 Invisible 0
SYMATTR InstName V1
SYMATTR Value 0
SYMBOL f -432 -80 R0
WINDOW 0 16 0 Left 0
WINDOW 3 40 41 Left 0
WINDOW 123 16 80 Left 0
SYMATTR InstName F1
SYMATTR Value V1
SYMATTR Value2 1
SYMBOL voltage -768 -96 R0
WINDOW 123 0 0 Left 0
WINDOW 39 48 72 Left 0
WINDOW 3 -48 176 Left 0
WINDOW 0 -42 57 Right 0
SYMATTR Value SINE(0 1 {f} 0 {-f/3} 90)
SYMATTR InstName Vs
SYMBOL g 272 -96 R0
WINDOW 0 16 16 Left 0
WINDOW 3 16 96 Left 0
SYMATTR InstName G2
SYMATTR Value 50m
SYMBOL cap 128 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 64 Left 0
SYMATTR InstName C2
SYMATTR Value 1n
SYMBOL h 0 -96 M0
WINDOW 0 16 16 Left 0
WINDOW 3 40 56 Left 0
WINDOW 123 16 96 Left 0
SYMATTR InstName H1
SYMATTR Value V1
SYMATTR Value2 1k
SYMBOL res 416 -96 R0
WINDOW 0 32 16 Left 0
WINDOW 3 32 96 Left 0
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL ind -480 -96 M0
WINDOW 0 48 40 Left 0
WINDOW 3 48 72 Left 0
SYMATTR InstName L1
SYMATTR Value {100u*n}
SYMBOL res -720 -96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 50
SYMBOL res 240 -192 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
SYMATTR InstName R2
SYMATTR Value 1
SYMBOL Misc\\xvaristor 496 -96 R0
WINDOW 0 48 16 Left 0
WINDOW 3 48 48 Left 0
WINDOW 39 48 72 Left 0
WINDOW 40 48 96 Left 0
SYMATTR InstName X2
SYMATTR Value Rnd
SYMATTR SpiceLine v=3k
SYMATTR SpiceLine2 r=0
SYMBOL Misc\\xvaristor 128 -128 R90
WINDOW 0 0 56 VBottom 0
WINDOW 3 32 56 VTop 0
WINDOW 39 56 56 VTop 0
WINDOW 40 80 56 VTop 0
SYMATTR InstName X1
SYMATTR Value Rnd
SYMATTR SpiceLine v=100
SYMATTR SpiceLine2 r=3k
SYMBOL cap 336 -80 R0
WINDOW 0 32 0 Left 0
WINDOW 3 32 64 Left 0
SYMATTR InstName C3
SYMATTR Value 5n
TEXT -816 200 Left 0 !.step param n list .1 1 1k
TEXT -312 88 Left 0 !.subckt Rnd 1 2 v=1 r=0\n.param n=v/.83-1\nE1 1 3 3 2 {max(n,0)}\nD1 2 3 rn\nD2 3 2 rn\n.model rn d(Is=1p Rs={r/n}) \n.ends Rnd
TEXT 128 88 Left 0 !.subckt Sqr 1 2 v=1 r=0\nD1 1 2 sq\n.model sq d(Vfwd={v} Vrev={v} Rs={r}) \n.ends Sqr
TEXT -816 232 Left 0 !.tran 0 {15/f} {1m/f} {1m/f} uic
TEXT -816 168 Left 0 !.param n=1 f=20k
TEXT -504 -176 VLeft 0 ;L1 models an air gap
TEXT -240 -232 VLeft 0 ;G1, C1, E1 models volt-sec\n applied to inductor
TEXT -424 -176 VLeft 0 ;F1, V1 reflects current resulting\n from applied volt-seconds
TEXT 520 -224 VLeft 0 ;X2 models saturation effects
TEXT -664 -176 VLeft 0 ;R1 models winding resistance
TEXT 432 -224 VLeft 0 ;R3 models low level\n linear inductance
TEXT 168 -240 VLeft 0 ;R2 models incremental\n saturation inductance
TEXT 48 -232 VLeft 0 ;H1, X1, C2, G2 models hysteresis\n effects (dc + ac widening)
TEXT 352 -224 VLeft 0 ;C3 models linear core loss
TEXT -80 -256 VLeft 0 ;V1 senses current drawn by\n applied volt-seconds
TEXT -112 -656 Bottom 0 ;Non Linear Inductor Model (Preliminary) by analog@ieee.org - 04/04\nfor B - H style curves plot V(flux) and change x-axis from time to I(R1)
TEXT 128 224 Left 0 ;Note: for abrupt limiting effects\nsubstitute "Sqr" subcircuit model
LINE Normal -56 -64 -56 -136 2
LINE Normal -272 -144 -368 -96 2
LINE Normal -144 -144 -272 -144 2
LINE Normal -384 -64 -368 -96 2
LINE Normal -96 -160 -144 -144 2