Simple TTL question

T

Tim Klinger

Guest
I'm building something with a 7400N quad nand chip and don't
understand the way it's behaving. If I just power the chip (pin 14 to
+5, pin 7 to ground), connect pins 1 and 2 to ground, and check the
voltage at pin 3, I see something around 3V. Shouldn't I be getting
+5V?

I'm using the 7400 to debounce a pushbutton switch and running the
output to a JK flip flop to make a "stateful" switch that changes
state when the switch is pushed and released and holds that state
until it's pushed (and released) again. It's behaving unpredictably
and I can't figure out why. I'm obviously new to this so I'd
appreciate any tips or advice.

Thanks very much,
Tim Klinger
 
On 5 Feb 2004 06:36:53 -0800, organmorgan123@yahoo.com (Tim Klinger)
wrote:

I'm building something with a 7400N quad nand chip and don't
understand the way it's behaving. If I just power the chip (pin 14 to
+5, pin 7 to ground), connect pins 1 and 2 to ground, and check the
voltage at pin 3, I see something around 3V. Shouldn't I be getting
+5V?
Click to expand...
---
Not necessarily. The high output voltage (Voh) of a 7400 gate is
specified as 2.4V minimum and 3.4V typical with a 400ľA load and a 4.5V
supply, so yours seems to be in there somewhere.
---

I'm using the 7400 to debounce a pushbutton switch and running the
output to a JK flip flop to make a "stateful" switch that changes
state when the switch is pushed and released and holds that state
until it's pushed (and released) again. It's behaving unpredictably
and I can't figure out why. I'm obviously new to this so I'd
appreciate any tips or advice.
Click to expand...
---
You're probably not debouncing the switch properly. How are you hooking
the switch up to the gate? Is it a SPST momentary switch? If not, what
is it?

--
John Fields
 
John Fields <jfields@austininstruments.com> wrote in message news:<r2m420tn4ens8kegok9o6702jjf8sssi14@4ax.com>...
On 5 Feb 2004 06:36:53 -0800, organmorgan123@yahoo.com (Tim Klinger)
wrote:

I'm building something with a 7400N quad nand chip and don't
understand the way it's behaving. If I just power the chip (pin 14 to
+5, pin 7 to ground), connect pins 1 and 2 to ground, and check the
voltage at pin 3, I see something around 3V. Shouldn't I be getting
+5V?

---
Not necessarily. The high output voltage (Voh) of a 7400 gate is
specified as 2.4V minimum and 3.4V typical with a 400ľA load and a 4.5V
supply, so yours seems to be in there somewhere.
Click to expand...
OK, that's good. Will 3V or so be enough to count as "high" when
connected to the clock line of a JK flip flop?

---

I'm using the 7400 to debounce a pushbutton switch and running the
output to a JK flip flop to make a "stateful" switch that changes
state when the switch is pushed and released and holds that state
until it's pushed (and released) again. It's behaving unpredictably
and I can't figure out why. I'm obviously new to this so I'd
appreciate any tips or advice.

---
You're probably not debouncing the switch properly. How are you hooking
the switch up to the gate? Is it a SPST momentary switch? If not, what
is it?
Click to expand...
It's a SPDT momentary switch. I'm connecting the common pole to
ground and each of the others to a nand gate and also to one end of a
2.2k resistor (the other end of which is connected to +5). I'm
connecting the output (pin 3) to the JK flip flop.

Thanks,
Tim
 
7400N quad nand chip
I...power the chip (pin 14 to +5, pin 7 to ground),
connect pins 1 and 2 to ground, and check the voltage at pin 3,
I see something around 3V. Shouldn't I be getting +5V?
Tim Klinger
Click to expand...
Even the unused gates can affect the results.
Start by tying all unused inputs to a definate logic state
(connect them to the supply voltage or to ground).
 
On 5 Feb 2004 10:46:06 -0800, organmorgan123@yahoo.com (Tim Klinger)
wrote:

John Fields <jfields@austininstruments.com> wrote in message news:<r2m420tn4ens8kegok9o6702jjf8sssi14@4ax.com>...
On 5 Feb 2004 06:36:53 -0800, organmorgan123@yahoo.com (Tim Klinger)
wrote:

I'm building something with a 7400N quad nand chip and don't
understand the way it's behaving. If I just power the chip (pin 14 to
+5, pin 7 to ground), connect pins 1 and 2 to ground, and check the
voltage at pin 3, I see something around 3V. Shouldn't I be getting
+5V?
Click to expand...

Not necessarily. The high output voltage (Voh) of a 7400 gate is
specified as 2.4V minimum and 3.4V typical with a 400ľA load and a 4.5V
supply, so yours seems to be in there somewhere.

OK, that's good. Will 3V or so be enough to count as "high" when
connected to the clock line of a JK flip flop?
Click to expand...

If it is a TTL or LSTTL flip-flop.

Bipolar TTL logic parts will consider anything above 2.4 volts as a
high, and anything below 0.8 volts as a low.











--
Peter Bennett VE7CEI
email: peterbb (at) interchange.ubc.ca
GPS and NMEA info and programs: http://vancouver-webpages.com/peter/index.html
Newsgroup new user info: http://vancouver-webpages.com/nnq
 
On 5 Feb 2004 10:46:06 -0800, organmorgan123@yahoo.com (Tim Klinger)
wrote:

John Fields <jfields@austininstruments.com> wrote in message news:<r2m420tn4ens8kegok9o6702jjf8sssi14@4ax.com>...
On 5 Feb 2004 06:36:53 -0800, organmorgan123@yahoo.com (Tim Klinger)
wrote:

I'm building something with a 7400N quad nand chip and don't
understand the way it's behaving. If I just power the chip (pin 14 to
+5, pin 7 to ground), connect pins 1 and 2 to ground, and check the
voltage at pin 3, I see something around 3V. Shouldn't I be getting
+5V?

---
Not necessarily. The high output voltage (Voh) of a 7400 gate is
specified as 2.4V minimum and 3.4V typical with a 400ľA load and a 4.5V
supply, so yours seems to be in there somewhere.

OK, that's good. Will 3V or so be enough to count as "high" when
connected to the clock line of a JK flip flop?

---

I'm using the 7400 to debounce a pushbutton switch and running the
output to a JK flip flop to make a "stateful" switch that changes
state when the switch is pushed and released and holds that state
until it's pushed (and released) again. It's behaving unpredictably
and I can't figure out why. I'm obviously new to this so I'd
appreciate any tips or advice.

---
You're probably not debouncing the switch properly. How are you hooking
the switch up to the gate? Is it a SPST momentary switch? If not, what
is it?

It's a SPDT momentary switch. I'm connecting the common pole to
ground and each of the others to a nand gate and also to one end of a
2.2k resistor (the other end of which is connected to +5). I'm
connecting the output (pin 3) to the JK flip flop.
Click to expand...
---
Reply at a.b.s.e.

--
John Fields
 
Voltages for logic levels is how logic families differ.
Conventional TTL would output a logic 1 above 2.4 volts and a
logic 0 below 0.7. Thresholds for TTL inputs defined logic
one at something less than 2.4 and a logic zero at something
above 0.7 volts. Sufficient margin for error.

But if that 2.4 volt logic one from a TTL drove a CMOS
(74C00) logic chip, then the CMOS could self destruct. CMOS
required a logic one to be higher - something more like 3.8
volts. A voltage sitting between 1 and 3 volts on a CMOS
input could cause that IC to destroy itself.

IOW verify logic one and logic zero voltage levels - both
for inputs and outputs. These are a first difference between
the many logic families.

There are logic ICs designed just for debouncing switches.
Even the famous NE555 does this function better; and using one
chip instead of two. Just some better ideas. Finish your
current design to better appreciate the suggestions.

Tim Klinger wrote:
OK, that's good. Will 3V or so be enough to count as "high" when
connected to the clock line of a JK flip flop?

It's a SPDT momentary switch. I'm connecting the common pole to
ground and each of the others to a nand gate and also to one end of a
2.2k resistor (the other end of which is connected to +5). I'm
connecting the output (pin 3) to the JK flip flop.
Click to expand...
 
I'm building something with a 7400N quad nand chip and don't
understand the way it's behaving. If I just power the chip (pin 14 to
+5, pin 7 to ground), connect pins 1 and 2 to ground, and check the
voltage at pin 3, I see something around 3V. Shouldn't I be getting
+5V?

I'm using the 7400 to debounce a pushbutton switch and running the
output to a JK flip flop to make a "stateful" switch that changes
state when the switch is pushed and released and holds that state
until it's pushed (and released) again. It's behaving unpredictably
and I can't figure out why. I'm obviously new to this so I'd
appreciate any tips or advice.

Thanks very much,
Tim Klinger
Click to expand...
You've gotten quite a few answers on logic levels, but I'm wondering about your
using the 7400 to debounce a pushbutton switch. Unless you do it right, your
switch bounce will just pass right thru to the J-K FF, causing problems.
Here's an alternative (credit due to Mr. Don Lancaster's classic TTL Cookbook
-- view in fixed font or M$ Notepad):



VCC
| 6.8K
.-. ___
1K | | .----------|___|----------.
| | |VCC VCC |
'-' || __ | __ |
T 10 | 470 |'---| | '---| | |
--- ___ | ___ | |& |o--. |& |o----o-------o OUT
.---o o--|___|----o---|___|-o----|__| '----|__|
|
|
GND


This will not invert, but it will work. If you need to invert, just add
another 7400 gate. The two 7400 gates with the feedback resistor form a
non-inverting schmitt trigger, which has hysteresis. That, along with the
rapidly falling and slowly rising input, will get you a clean one-transition
signal.

Of course, you could just use 1/6 of a 7414 Hex Schmitt Trigger Inverter, and
be done with it.

Don Lancaster's Guru's Lair has the classic TTL Cookbook (example above from p.
166, except he used a 7404), just about everything he's ever written, and a lot
of great advice for all -- it's worth the time.

http://www.tinaja.com/

Good luck.
Chris
 
From: organmorgan123@yahoo.com (Tim Klinger)
Date: 2/5/2004 8:36 AM Central Standard Time
Message-id: <e5239d50.0402050636.2395708c@posting.google.com

I'm building something with a 7400N quad nand chip and don't
understand the way it's behaving. If I just power the chip (pin 14 to
+5, pin 7 to ground), connect pins 1 and 2 to ground, and check the
voltage at pin 3, I see something around 3V. Shouldn't I be getting
+5V?

I'm using the 7400 to debounce a pushbutton switch and running the
output to a JK flip flop to make a "stateful" switch that changes
state when the switch is pushed and released and holds that state
until it's pushed (and released) again. It's behaving unpredictably
and I can't figure out why. I'm obviously new to this so I'd
appreciate any tips or advice.

Thanks very much,
Tim Klinger
Click to expand...
You've gotten quite a few answers on logic levels, but I'm wondering about your
using the 7400 to debounce a pushbutton switch. Unless you do it right, your
switch bounce will just pass right thru to the J-K FF, causing problems.
Here's an alternative (credit due to Mr. Don Lancaster's classic TTL Cookbook
-- view in fixed font or M$ Notepad):




VCC
| 6.8K
.-. ___
1K | | .----------|___|----------.
| | |VCC VCC |
'-' || __ | __ |
T 10 | 470 |'---| | '---| | |
--- ___ | ___ | |& |o--. |& |o----o-------o OUT
.---o o--|___|----o---|___|-o----|__| '----|__|
|
| | +
GND ### 100uF
---
|
|
===
GND



This will not invert, but it will work. If you need to invert, just add
another 7400 gate. The two 7400 gates with the feedback resistor form a
non-inverting schmitt trigger, which has hysteresis. That, along with the
rapidly falling and slowly rising input, will get you a clean one-transition
signal.

Of course, you could just use 1/6 of a 7414 Hex Schmitt Trigger Inverter, and
be done with it.

Don Lancaster's Guru's Lair has the classic TTL Cookbook (example above from p.
166, except he used a 7404), just about everything he's ever written, and a lot
of great advice for all -- it's worth the time.

http://www.tinaja.com/

Good luck.
Chris
 
Posting the same question independently to multiple groups
is a bad idea.
How is someone answering it in 1 group
supposed to know it has already been adequately answered in another
(or to make corrections to incorrect responses)?
 
jeffm_@email.com (JeffM) wrote in message news:<f8b945bc.0402061155.5951bbef@posting.google.com>...
Posting the same question independently to multiple groups
is a bad idea.
How is someone answering it in 1 group
supposed to know it has already been adequately answered in another
(or to make corrections to incorrect responses)?
Click to expand...
It was a mistake. I didn't see my response posted so I reposted.

Thanks to all of you who responded. I understand better what's going
on. I will try the "cookbook" circuit posted and see if it improves
things...

Best,
Tim
 
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