A
Active8
Guest
The 700 series model lib doesn't install the subckts, just the
models. I'm trying to do it myself using Simetrix 4.5 Intro.
Lots of probs and question arise and the typically poor
documentation isn't helping much.
Here's a snip from the library:
******** N P N TRANSISTORS *********
..SUBCKT NPN1 1 2 3
Q1 1 2 3 #SUB N1 lot=700SER
Q2 #SUB 1 2 #SUB P1 lot=700SER
D1 2 3 DZ lot=700SER
D2 #SUB 1 DCS
C1 #SUB #SUB2 1E-12
..ENDS
..MODEL N1 NPN IS=3.8E-16 BF=220 BR=0.7
+ ISE=1.8E-16 IKF=1.7E-2 NK=0.75 IKR=3E-2 NE=1.4 VAF=60
+ VAR=7 RC=63.4 RB=300 RE=19.7 XTB=1.17 XTI=5.4
+ TF=1.5E-10 TR=6E-9 XTF=0.3 VTF=6 ITF=5E-5 CJE=0.21E-12
+ MJE=0.33 VJE=0.7 ISC=5E-12 KF=2E-13 AF=1.4
..MODEL N1 NPN.tol IS=0.75 BF=.9
..MODEL N1 NPN.match IS=.03 BF=.03
..MODEL P1 PNP IS=1E-15 BF=100 CJE=0.175E-12 XTI=5.4
+ MJE=0.38 VJE=0.6
**************
Here's the subckt:
C
|
|
+-----+------------------+
| | |
| | |
Q1 |/ | |
B ----+-----|-------|------| |
| |> | | |
| | | | /---/
| | | |< ^
| | +----| Q2 |
V | |\ |
- | | |
| | | |
| | | |
+-------+ +-----------+
| |
| |
| |
E Sub
I haven't decided whether to go with numerical pins yet.
1. The 700 manual shows subckts (e.g., device NPN1) with regular
terminals (little squares). Netlister wants global module ports
(solid rectangles) - did the symbol change?
2. 700 manual shows pin names like 1 (C), and 4 (Sub), but these
won't netlist, IIRC - maybe there's a text object there, but at any
rate, the subckt shows node #SUB, not 4.
..SUBCKT NPN1 1 2 3
Q1 1 2 3 #SUB N1 lot=700SER
see - no SUB node on the .subckt line and the real headbanger is
that Q1 is not connected to SUB in the subcircuit. Here's the
netlist I got from my subckt:
..subckt NPN1 C B E Sub
D1 Sub C DCS
D2 B E DZ
Q2 Sub C B 0 P1
X$Q3 Q3_C Q3_B Q3_E Q3_Sub NPN_MODEL
Q1 C B E 0 N1
..ends NPN1
Q1 C B E 0 N1
No clue why node 0 is there - I didn't place a ground. It looks like
Q1 and Q2 are 4 terminal devices yet their .models are nodeless
since bjt models are built in to spice or wtf I mean.
3. I don't understand the lot=700SER param
Then there's this from the 700 series library:
***********************************************************
..SUBCKT SUB 1
R1 1 #SUB 1
R2 #SUB #SUB2 1
..options mc_absolute_rect
..ENDS
..SUBCKT SUB1 1
R1 1 #SUB1 1
..options mc_absolute_rect
..ENDS
***********************************************************
This is supposedly a substrate part
4. I don't understand why it's needed when it's just a hidden node.
5. I don't understand why it's represented by a couple of 1 ohm
resistors.
6. I don't understand why R2 is there at all and where the hell
#SUB2 came from.
7. .options mc_absolute_rect doesn't ring a bell, but that's a sim
command, right?
8. Why is N1 modeled more than once and how does the netlister (?)
know which model I'm referencing?
Note: The info I've posted from the 700 series manual differs from
that in Hans' designanalogchips.pdf document. The subcircuit's
different and the netlist is too
..SUBCKT NPN1 1 2 3 4
Q1 1 2 3 N1
Q2 4 1 2 P1
D1 2 3 DZ
D2 4 1 DCS
..ENDS
..SUBCKT NPN1 1 2 3 from 7MANUAL.PDF
..SUBCKT NPN1 1 2 3 4 from designanalogchips.pdf
TIA
--
Best Regards,
Mike
models. I'm trying to do it myself using Simetrix 4.5 Intro.
Lots of probs and question arise and the typically poor
documentation isn't helping much.
Here's a snip from the library:
******** N P N TRANSISTORS *********
..SUBCKT NPN1 1 2 3
Q1 1 2 3 #SUB N1 lot=700SER
Q2 #SUB 1 2 #SUB P1 lot=700SER
D1 2 3 DZ lot=700SER
D2 #SUB 1 DCS
C1 #SUB #SUB2 1E-12
..ENDS
..MODEL N1 NPN IS=3.8E-16 BF=220 BR=0.7
+ ISE=1.8E-16 IKF=1.7E-2 NK=0.75 IKR=3E-2 NE=1.4 VAF=60
+ VAR=7 RC=63.4 RB=300 RE=19.7 XTB=1.17 XTI=5.4
+ TF=1.5E-10 TR=6E-9 XTF=0.3 VTF=6 ITF=5E-5 CJE=0.21E-12
+ MJE=0.33 VJE=0.7 ISC=5E-12 KF=2E-13 AF=1.4
..MODEL N1 NPN.tol IS=0.75 BF=.9
..MODEL N1 NPN.match IS=.03 BF=.03
..MODEL P1 PNP IS=1E-15 BF=100 CJE=0.175E-12 XTI=5.4
+ MJE=0.38 VJE=0.6
**************
Here's the subckt:
C
|
|
+-----+------------------+
| | |
| | |
Q1 |/ | |
B ----+-----|-------|------| |
| |> | | |
| | | | /---/
| | | |< ^
| | +----| Q2 |
V | |\ |
- | | |
| | | |
| | | |
+-------+ +-----------+
| |
| |
| |
E Sub
I haven't decided whether to go with numerical pins yet.
1. The 700 manual shows subckts (e.g., device NPN1) with regular
terminals (little squares). Netlister wants global module ports
(solid rectangles) - did the symbol change?
2. 700 manual shows pin names like 1 (C), and 4 (Sub), but these
won't netlist, IIRC - maybe there's a text object there, but at any
rate, the subckt shows node #SUB, not 4.
..SUBCKT NPN1 1 2 3
Q1 1 2 3 #SUB N1 lot=700SER
see - no SUB node on the .subckt line and the real headbanger is
that Q1 is not connected to SUB in the subcircuit. Here's the
netlist I got from my subckt:
..subckt NPN1 C B E Sub
D1 Sub C DCS
D2 B E DZ
Q2 Sub C B 0 P1
X$Q3 Q3_C Q3_B Q3_E Q3_Sub NPN_MODEL
Q1 C B E 0 N1
..ends NPN1
Q1 C B E 0 N1
No clue why node 0 is there - I didn't place a ground. It looks like
Q1 and Q2 are 4 terminal devices yet their .models are nodeless
since bjt models are built in to spice or wtf I mean.
3. I don't understand the lot=700SER param
Then there's this from the 700 series library:
***********************************************************
..SUBCKT SUB 1
R1 1 #SUB 1
R2 #SUB #SUB2 1
..options mc_absolute_rect
..ENDS
..SUBCKT SUB1 1
R1 1 #SUB1 1
..options mc_absolute_rect
..ENDS
***********************************************************
This is supposedly a substrate part
4. I don't understand why it's needed when it's just a hidden node.
5. I don't understand why it's represented by a couple of 1 ohm
resistors.
6. I don't understand why R2 is there at all and where the hell
#SUB2 came from.
7. .options mc_absolute_rect doesn't ring a bell, but that's a sim
command, right?
8. Why is N1 modeled more than once and how does the netlister (?)
know which model I'm referencing?
Note: The info I've posted from the 700 series manual differs from
that in Hans' designanalogchips.pdf document. The subcircuit's
different and the netlist is too
..SUBCKT NPN1 1 2 3 4
Q1 1 2 3 N1
Q2 4 1 2 P1
D1 2 3 DZ
D2 4 1 DCS
..ENDS
..SUBCKT NPN1 1 2 3 from 7MANUAL.PDF
..SUBCKT NPN1 1 2 3 4 from designanalogchips.pdf
TIA
--
Best Regards,
Mike