V
vikramts
Guest
Hi everybody
I could really use some help with a circuit that i am trying to simulate
to generate a sigmoid function. the description of the circuit is given
below, but my problem has more to do with the coding part(i think). When i
run a simulation with .rise(1m) for the pulse input, i find that the
simulation stalls with an error message stating that the time step used is
too small.
Increasing the rise parameter helps make the simulation run completely but
the input voltage is not swept completely(ie: for a -2.5 to +2.5 range, i
see -2.5 to -1.8v upon selecting the inputsignal in the waveform viewer).
I have posted a description of the circuit below and the core portion of
my code. I'd be happy to give the complete code if somebody can help me.
Circuit Description:
This is a voltage comparator coupled to 2 inverters. the comparator is an
opamp with input sweep voltage(-2.5 to +2.5v) given through a 40kohm
resistor to the +ve terminal. there is a feedback resistance of 1000kohm
from output to +ve , and the neg terminal is grounded. the output of the
opamp is fed to an inverter through a 600kohm resistor and the output of
the inverter is again fed to another inverter through a 600kohm. there is
a 100kohm resistor in the feedback loop of each inverter(from output to
input).
I'd like to know if I can simulate this circuit at all as such, because I
read somewhere that opamps with positive feedback and grounded neg
terminals are bi-stable devices with output driven to saturation state.
Could somebody help me? I am using the Cadence-AMS simulator.
VERILOG-AMS CODE:
`include "constants.vams"
`include "disciplines.vams"
`timescale 10ps/1ps
module
cmossigvar(vinr,vinp1,vinn1,vout1,vinv1,vout2,vinv2,vout3,vdd,vss,vref);
inout vinr,vinp1,vinn1,vout1,vinv1,vinv2,vout2,vout3,vdd,vss,vref;
electrical vinr,vinp1,vinn1,vout1,vinv1,vinv2,vout2,vout3,vdd,vss,vref;
ground vref;
integer results;
//Writing data into file
initial
begin
results=$fopen("cmossigvar100.txt");
$fdisplay(results,"CMOS Sigmoid Variable Gain Model Test Bench
Results:Gain=100");
forever
#1000000 $fdisplay(results,"%t %f %f",$time,V(vinr),V(vout3));
$fwrite(results,"\n");
$fclose(results);
end
//Component Instantiation
opampcmos opamp1(vout1,vinp1,vinn1,vdd,vss,vref);
mosinverter inv2(vinv1,vout2,vss,vdd,vref);
mosinverter inv3(vinv2,vout3,vss,vdd,vref);
res #(.rn(4k)) resistor1(vinr,vinp1);
res #(.rn(10k)) resistor2(vinp1,vout1);
capa #(.c(0.1u)) capacitf(vinp1,vout1);
res #(.rn(1k)) resistor3(vout1,vinv1);
res #(.rn(100k)) resistor4(vinv1,vout2);
res #(.rn(1k)) resistor5(vout2,vinv2);
res #(.rn(100k)) resistor6(vinv2,vout3);
//Voltage sources and inputs
vsource
#(.type("pulse"),.val0(-2.5),.val1(2.5),.rise(1m))vin1(vinr,vref);
vsource #(.type("dc"),.dc(15))vin2(vdd,vref);
vsource #(.type("dc"),.dc(-15))vin3(vss,vref);
analog
V(vinn1,vref) <+ 0;
endmodule
I could really use some help with a circuit that i am trying to simulate
to generate a sigmoid function. the description of the circuit is given
below, but my problem has more to do with the coding part(i think). When i
run a simulation with .rise(1m) for the pulse input, i find that the
simulation stalls with an error message stating that the time step used is
too small.
Increasing the rise parameter helps make the simulation run completely but
the input voltage is not swept completely(ie: for a -2.5 to +2.5 range, i
see -2.5 to -1.8v upon selecting the inputsignal in the waveform viewer).
I have posted a description of the circuit below and the core portion of
my code. I'd be happy to give the complete code if somebody can help me.
Circuit Description:
This is a voltage comparator coupled to 2 inverters. the comparator is an
opamp with input sweep voltage(-2.5 to +2.5v) given through a 40kohm
resistor to the +ve terminal. there is a feedback resistance of 1000kohm
from output to +ve , and the neg terminal is grounded. the output of the
opamp is fed to an inverter through a 600kohm resistor and the output of
the inverter is again fed to another inverter through a 600kohm. there is
a 100kohm resistor in the feedback loop of each inverter(from output to
input).
I'd like to know if I can simulate this circuit at all as such, because I
read somewhere that opamps with positive feedback and grounded neg
terminals are bi-stable devices with output driven to saturation state.
Could somebody help me? I am using the Cadence-AMS simulator.
VERILOG-AMS CODE:
`include "constants.vams"
`include "disciplines.vams"
`timescale 10ps/1ps
module
cmossigvar(vinr,vinp1,vinn1,vout1,vinv1,vout2,vinv2,vout3,vdd,vss,vref);
inout vinr,vinp1,vinn1,vout1,vinv1,vinv2,vout2,vout3,vdd,vss,vref;
electrical vinr,vinp1,vinn1,vout1,vinv1,vinv2,vout2,vout3,vdd,vss,vref;
ground vref;
integer results;
//Writing data into file
initial
begin
results=$fopen("cmossigvar100.txt");
$fdisplay(results,"CMOS Sigmoid Variable Gain Model Test Bench
Results:Gain=100");
forever
#1000000 $fdisplay(results,"%t %f %f",$time,V(vinr),V(vout3));
$fwrite(results,"\n");
$fclose(results);
end
//Component Instantiation
opampcmos opamp1(vout1,vinp1,vinn1,vdd,vss,vref);
mosinverter inv2(vinv1,vout2,vss,vdd,vref);
mosinverter inv3(vinv2,vout3,vss,vdd,vref);
res #(.rn(4k)) resistor1(vinr,vinp1);
res #(.rn(10k)) resistor2(vinp1,vout1);
capa #(.c(0.1u)) capacitf(vinp1,vout1);
res #(.rn(1k)) resistor3(vout1,vinv1);
res #(.rn(100k)) resistor4(vinv1,vout2);
res #(.rn(1k)) resistor5(vout2,vinv2);
res #(.rn(100k)) resistor6(vinv2,vout3);
//Voltage sources and inputs
vsource
#(.type("pulse"),.val0(-2.5),.val1(2.5),.rise(1m))vin1(vinr,vref);
vsource #(.type("dc"),.dc(15))vin2(vdd,vref);
vsource #(.type("dc"),.dc(-15))vin3(vss,vref);
analog
V(vinn1,vref) <+ 0;
endmodule