Should this substitution be compilable?

V

valentin tihomirov

Guest
compiler accepts this:
constant LOG2: positive := UTILS.BITS_TO_FIT(X);
constant C: Integer := UTILS.MUX2(WIDTH, LOG2, COND);

but not this:

constant C: Integer := MUX2(WIDTH, BITS_TO_FIT(X), COND);

errors:
- Cannot find function MUX2 for these actuals
- Assignment target incompatible with right side. Expected type
"INTEGER"

the functions used:
function BITS_TO_FIT(N: natural) return positive; -- "log2_ceiling"
function MUX2(I0, I1: Integer; SEL: boolean) return Integer;

Just wanted to avoid intermediate constant LOG2 as it has no sense per se.
 
valentin tihomirov wrote:

- Cannot find function MUX2 for these actuals
- Assignment target incompatible with right side. Expected type
"INTEGER"
Click to expand...

Just a type mismatch. Modify function MUX2:

function MUX2(I0, I1: positive; SEL: boolean) return positive;

-- Mike Treseler
 
Just a type mismatch. Modify function MUX2:

function MUX2(I0, I1: positive; SEL: boolean) return positive;
Click to expand...
But positive is subtype of integer; thus, any positive must be acceptable at
integer position. For this reason MUX2(LOG2) is compilable. I see nothing
which could prevent MUX2(Integer(GET_POSITIVE())) from compilation.
 
valentin tihomirov a écrit:
compiler accepts this:
constant LOG2: positive := UTILS.BITS_TO_FIT(X);
constant C: Integer := UTILS.MUX2(WIDTH, LOG2, COND);

but not this:

constant C: Integer := MUX2(WIDTH, BITS_TO_FIT(X), COND);
Click to expand...
Have you tried this:

constant C: Integer := UTILS.MUX2(WIDTH, UTILS.BITS_TO_FIT(X), COND); ?

That's the only obvious difference I can see.

--
____ _ __ ___
| _ \_)/ _|/ _ \ Adresse de retour invalide: retirez le -
| | | | | (_| |_| | Invalid return address: remove the -
|_| |_|_|\__|\___/
 
Hi valentin,

I had the same problem few days ago. Go to this link..

http://groups.google.com/groups?hl=en&lr=&q=Simulation+error+while+writing&meta=group%3Dcomp.lang.vhdl


What I understood was a function CANNOT take parameters which are
expression .So nested functions are not possible like in C lang.
Still not Completely Clear Why is it so ....... Hope to find this time
from this thread...

Regards,
Mohammed A khader.
 
Yes, I've tried the full name. Result is the same.
 
Thanks for the participation. The problem was with the tool indeed.

this line started to compile
constant A: Integer := UTILS.MUX2(W, UTILS.BITS_TO_FIT(X), FLAG);

after the following declaration:
use UTILS.MUX2;

May be this is because MUX2 is overloaded. Unfortunately, we have no general
ternary operator so far.
 
Mohammed khader wrote:
Hi valentin,

I had the same problem few days ago. Go to this link..

http://groups.google.com/groups?hl=en&lr=&q=Simulation+error+while+writing&meta=group%3Dcomp.lang.vhdl

What I understood was a function CANNOT take parameters which are
expression .So nested functions are not possible like in C lang.
Still not Completely Clear Why is it so ....... Hope to find this time
from this thread...
Click to expand...
When I checked the LRM, it says that the formal parameter may only be a
function if it is a type conversion. So a function with two parameters
is not acceptable.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
rickman wrote:
Mohammed khader wrote:

Hi valentin,

I had the same problem few days ago. Go to this link..

http://groups.google.com/groups?hl=en&lr=&q=Simulation+error+while+writing&meta=group%3Dcomp.lang.vhdl

What I understood was a function CANNOT take parameters which are
expression .So nested functions are not possible like in C lang.
Still not Completely Clear Why is it so ....... Hope to find this time
from this thread...


When I checked the LRM, it says that the formal parameter may only be a
function if it is a type conversion. So a function with two parameters
is not acceptable.
Click to expand...
The formal parameter is the name on the left of named association.
Here there is not formal parameter specified since the call is
by positional association.

However, the actual parameter to a subprogram may be an expression
if the class of the object is a constant (which it is here because
the mode when not specified defaults to in and the class when not
specified for mode in defaults to constant).

Cheers,
Jim
--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training mailto:Jim@SynthWorks.com
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
Valentin,
Can't really narrow your problem down without seeing more.

First as an experiment, have you checked that the
original code still compiles?

_If it does not work_, did you move where the constants
or subprograms are defined? If the subprograms and
the constants are in the same package, then the subprograms
need to be declared before the constants.

_If it does not work_, did you accidentially compile
UTILS into more than one named library that is currently
visible? In this case Mux2 will be hidden unless you
also specify th elibrary name:

constant LOG2: positive := work.UTILS.BITS_TO_FIT(X);
constant C: Integer := work.UTILS.MUX2(WIDTH, LOG2, COND);


Given the declarations of the subprograms if the first
form did not break, it seems the second form should work.
Just to humor the compiler, you might try typecasting
the positive argument into being integer:

constant C: Integer := work.UTILS.MUX2(WIDTH, integer(WORK.UTILS.BITS_TO_FIT(X)), COND);


If none of the above work, I would exit the tool and delete
the library and any tool generated ini files (unless you have
customized them). Then I would try again.

Cheers,
Jim







valentin tihomirov wrote:
compiler accepts this:
constant LOG2: positive := UTILS.BITS_TO_FIT(X);
constant C: Integer := UTILS.MUX2(WIDTH, LOG2, COND);

but not this:

constant C: Integer := MUX2(WIDTH, BITS_TO_FIT(X), COND);

errors:
- Cannot find function MUX2 for these actuals
- Assignment target incompatible with right side. Expected type
"INTEGER"

the functions used:
function BITS_TO_FIT(N: natural) return positive; -- "log2_ceiling"
function MUX2(I0, I1: Integer; SEL: boolean) return Integer;

Just wanted to avoid intermediate constant LOG2 as it has no sense per se.
Click to expand...

--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training mailto:Jim@SynthWorks.com
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
Jim Lewis wrote:
rickman wrote:
Mohammed khader wrote:

Hi valentin,

I had the same problem few days ago. Go to this link..

http://groups.google.com/groups?hl=en&lr=&q=Simulation+error+while+writing&meta=group%3Dcomp.lang.vhdl

What I understood was a function CANNOT take parameters which are
expression .So nested functions are not possible like in C lang.
Still not Completely Clear Why is it so ....... Hope to find this time
from this thread...


When I checked the LRM, it says that the formal parameter may only be a
function if it is a type conversion. So a function with two parameters
is not acceptable.

The formal parameter is the name on the left of named association.
Here there is not formal parameter specified since the call is
by positional association.

However, the actual parameter to a subprogram may be an expression
if the class of the object is a constant (which it is here because
the mode when not specified defaults to in and the class when not
specified for mode in defaults to constant).
Click to expand...
Sorry, I mixed up my formal and actual. I meant actual which is how the
OP is using the function within a function call.

I don't see in the LRM where it says the actual can be a constant
function call. But then this is a very hard to read section (4.3.2.2)
and I could easily be misinterpreting it.

--

Rick "rickman" Collins

rick.collins@XYarius.com
Ignore the reply address. To email me use the above address with the XY
removed.

Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design URL http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX
 
rickman wrote:
Jim Lewis wrote:

rickman wrote:

Mohammed khader wrote:


Hi valentin,

I had the same problem few days ago. Go to this link..

http://groups.google.com/groups?hl=en&lr=&q=Simulation+error+while+writing&meta=group%3Dcomp.lang.vhdl

What I understood was a function CANNOT take parameters which are
expression .So nested functions are not possible like in C lang.
Still not Completely Clear Why is it so ....... Hope to find this time

from this thread...


When I checked the LRM, it says that the formal parameter may only be a
function if it is a type conversion. So a function with two parameters
is not acceptable.

The formal parameter is the name on the left of named association.
Here there is not formal parameter specified since the call is
by positional association.

However, the actual parameter to a subprogram may be an expression
if the class of the object is a constant (which it is here because
the mode when not specified defaults to in and the class when not
specified for mode in defaults to constant).


Sorry, I mixed up my formal and actual. I meant actual which is how the
OP is using the function within a function call.

I don't see in the LRM where it says the actual can be a constant
function call. But then this is a very hard to read section (4.3.2.2)
and I could easily be misinterpreting it.
Click to expand...
Rick,

I am reading primarily from LRM section 2.1.1

Cheers,
Jim
--
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Jim Lewis
Director of Training mailto:Jim@SynthWorks.com
SynthWorks Design Inc. http://www.SynthWorks.com
1-503-590-4787

Expert VHDL Training for Hardware Design and Verification
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
rickman wrote:
Mohammed khader wrote:

Hi valentin,

I had the same problem few days ago. Go to this link..

http://groups.google.com/groups?hl=en&lr=&q=Simulation+error+while+writing&meta=group%3Dcomp.lang.vhdl

What I understood was a function CANNOT take parameters which are
expression .So nested functions are not possible like in C lang.
Still not Completely Clear Why is it so ....... Hope to find this time
from this thread...


When I checked the LRM, it says that the formal parameter may only be a
function if it is a type conversion. So a function with two parameters
is not acceptable.
Click to expand...
That statement is valid for port maps (if I'm not mistaken, I do not
have the LRM available right now). The OP did not instantiate a
component, he merely uses the return value of one function as parameter
to another function (whose return value is assigned to a constant). I
can't see anything wrong with that.

Paul.
 
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