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krby_xtrm
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how to include in a package a shift left/right operation??
ex. shift_r(input_vector) or shift_left(input_vector)??
ex. shift_r(input_vector) or shift_left(input_vector)??
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VHDL already has a shift operator ...how to include in a package a shift left/right operation??
ex. shift_r(input_vector) or shift_left(input_vector)??
The shift operators SLL, SRL, ROL and RORhow to include in a package a shift left/right operation??
krby_xtrm wrote:
how to include in a package a shift left/right operation??
The shift operators SLL, SRL, ROL and ROR
are a bit of a mess.
The operators work for
for numeric_std.unsigned and signed
like this:
byte_uns_v := byte_uns_v SLL 1;
The function numeric_std.shift_left(arg,n) is a
function that does the same thing.
byte_uns_v := shift_left(byte_uns_v, 1);
The operators work the same way on the
rarely used bit_vector type, but the
function above does not.
There are no standard or ieee
shift operators for std_logic_vector
but you can use an '&' like this:
byte_std_v := byte_std_v(6 downto 1) & in_v; --shift left
...a style I sometimes think is easier to read in any case
-- Mike Treseler
--PS: Don't ask about SLA. It only works on bit_vector
Use resize for unsigned. Oh my. . .
It seems like this might work a little better:-- shift_left --
sdata <= sdata(data'HIGH-1 downto 1) & inp; -- where inp is an input
bit to the shift register
-- same goes with shift_right --
sdata <= inp & sdata(data'HIGH-1 downto 1);