shift operator

[raghu]

hi all,
can anyone please tell me how to do a left shift in the folowing
manner.
suppose there are 5bits: 10010 now i have to shift left such that 1st
bit should go to the last position i.e 00101. when I use "<<" operator
the last position is appended with 0 i.e 00100. Is there any operator
in verilog to use?

Thanks a lot.

Regards,
Raghu

 

[Jonathan Bromley]

On 5 Jul 2006 00:08:24 -0700, "raghu" wrote:

can anyone please tell me how to do a left shift in the folowing
manner.
suppose there are 5bits: 10010 now i have to shift left such that 1st
bit should go to the last position i.e 00101. when I use "<<" operator
the last position is appended with 0 i.e 00100. Is there any operator

This isn't a left shift; it's a rotate.

If the rotate is by a fixed number of bit positions, it's easy using
concatenation:

reg [4:0] R;
....
R = { R[3:0], R[4] }; // rotate left by 1 position
R = { R[2:0], R[4:3] }; // rotate left by 2 positions

If the shift is by a variable number of bit positions, it's a little
trickier. You could write a function that used a for-loop to
copy the bits; or you could use the "funnel shift" trick where
you do a shift on the concatenation of two copies of the thing:

reg [4:0] R;
reg [4:0] junk;
integer rotate_count;
....
{ R, junk } = { R, R } << rotate_count;

Hope this helps
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
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Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
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The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

raghu wrote:

hi all,
can anyone please tell me how to do a left shift in the folowing
manner.
suppose there are 5bits: 10010 now i have to shift left such that 1st
bit should go to the last position i.e 00101. when I use "<<" operator
the last position is appended with 0 i.e 00100. Is there any operator
in verilog to use?

Another alternative way of doing a rotate is by using a separate shift
to get the upper bits down to the correct position and then OR them
into the result:

rotatedN = (value << N) | (value >> (width-N));

 

[Michael]

I like this way much better!
sharp@cadence.com wrote:

raghu wrote:
hi all,
can anyone please tell me how to do a left shift in the folowing
manner.
suppose there are 5bits: 10010 now i have to shift left such that 1st
bit should go to the last position i.e 00101. when I use "<<" operator
the last position is appended with 0 i.e 00100. Is there any operator
in verilog to use?

Another alternative way of doing a rotate is by using a separate shift
to get the upper bits down to the correct position and then OR them
into the result:

rotatedN = (value << N) | (value >> (width-N));

 

[Jonathan Bromley]

On 11 Jul 2006 01:50:39 -0700, Michael <michaelst@gmail.com> wrote:

[Steven Sharp]

Another alternative way of doing a rotate is by using a separate shift
to get the upper bits down to the correct position and then OR them
into the result:

rotatedN = (value << N) | (value >> (width-N));

[Michael]

I like this way much better!

Yes, but it might be worth noting that concatenation of two
copies of the source value is completely trivial in synthesis,
whereas calculating the shift value (width-N) might not be.

I haven't tried this out thoroughly in synthesis yet. I've no
doubt that some tools will correctly infer a rotate operation
from Steven Sharp's rotate expression, but I rather fear
that others won't.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

Jonathan Bromley wrote:

Yes, but it might be worth noting that concatenation of two
copies of the source value is completely trivial in synthesis,
whereas calculating the shift value (width-N) might not be.

You have a good point about synthesis. I wouldn't expect a
problem with the subtract in the shift value, since it is just a
re-numbering of the decode on the shift mux, but I don't have
much experience with synthesis. There may be other potential
inefficiencies in synthesis if it does not recognize this idiom.
It might produce two shift muxes and OR the results together,
rather than recognizing that the bits affected by each shift are
mutually exclusive and a single shift mux with appropriate
input wiring can do the job. I don't know whether lower-level
logic optimization would recognize this at the boolean level.