Setting a Verilog reg to a character string from ModelSim

[Charles Bailey]

I have a testbench written in Verilog that opens a file and reads source
data from it. I want to pass the name of the file to open from a TCL
command file. According to the Verilog book I have, character strings
can be stored in a reg variable by declaring a reg vector that is n*8
bits long. I am using ModelSim to do the simulation. According to the
ModelSim command reference, the "change" command can be used to set a
Verilog reg. But, it seems that the "change" command wants a bit-string
as the value. Is there any way to set a reg vector to a character
string using the ModelSim "change" command?

Thanks,
Charles Bailey

 

[Ajeetha Kumari]

Hi,
You should consider using $test$plusargs for this kind of thing. But
FWIW, here is an abstract idea of how you can do this.

1. Convert the "ascci" string to a "decimal array", i.e. convert:

"fname.txt" to equivalent ASCII representation, say:

"707865..."
F N A M E . T X T

A quick google search for ascci-2-tcl yielded a tcl proc, pasted
towards bottom of this post. You need to expand it to handle "array"
of characters.

2. Assign this new decimal value to the reg via change command.

3. Make sure you get what you wanted by printing the reg from within
Verilog.

Bottomline - I would rather use $test$plusargs

Hope atleast this gives a trigger, surely not the entire solution.
When I find time, I will add this to my web page FAQ

HTH,
Ajeetha
http://www.noveldv.com

P.S. Here is a TCL proc (thanks to google) to convert one character
ASCII-2-decimal.




# Somebody please help: How do we convert a character to its ASCII
code in Tcl?
# Short of that function, I'll just have to use brute force -- table
lookup.
set _ascii_ [format "%c" 0xff]
for {set i 1} {$i < 0x100} {incr i} {
set _ascii_ "$_ascii_[format "%c" $i]"
}
proc ord ch {
global _ascii_
if {$ch == [format "%c" 0xff]} {
return 0xff
} else {
return [string first $ch $_ascii_]
}
}


"Charles Bailey" <ceb_misc@ultrasw.com> wrote in message news:<10kp05jca864ie5@corp.supernews.com>...

I have a testbench written in Verilog that opens a file and reads source
data from it. I want to pass the name of the file to open from a TCL
command file. According to the Verilog book I have, character strings
can be stored in a reg variable by declaring a reg vector that is n*8
bits long. I am using ModelSim to do the simulation. According to the
ModelSim command reference, the "change" command can be used to set a
Verilog reg. But, it seems that the "change" command wants a bit-string
as the value. Is there any way to set a reg vector to a character
string using the ModelSim "change" command?

Thanks,
Charles Bailey

 

[Charles Bailey]

I don't see how converting the ASCII string to a decimal array would
work, but your post pointed me in the direction of converting the string
to a hexadecimal array. Here is what I came up, which allowed me to set
a reg vector to a character string with a TCL command:

# Routine to convert an ASCII character string to a hexadecimal string
proc ascii2hex {s} {
set result ""
set l [string length $s]
for {set i 0} {$i<$l} {incr i} {
scan [string index $s $i] %c n
append result [format "%X" $n]
}
return $result
}

Then, this series of TCL commands gives the desired result:
# Pad the sourcefile variable to the maximum length of 102 characters
set fnp [format "%-102s" $sourcefile]
# Convert to hexadecimal string
set fnx [ascii2hex $fnp]
# (filename is defined as "reg [1:102*8] filename;" )
change /filename X\"$fnx\"

Charles Bailey

"Ajeetha Kumari" <ajeetha@gmail.com> wrote in message
news:de3cfe35.0409200507.639f0c32@posting.google.com...

Hi,
You should consider using $test$plusargs for this kind of thing. But
FWIW, here is an abstract idea of how you can do this.

1. Convert the "ascci" string to a "decimal array", i.e. convert:

"fname.txt" to equivalent ASCII representation, say:

"707865..."


"Charles Bailey" <ceb_misc@ultrasw.com> wrote in message
news:<10kp05jca864ie5@corp.supernews.com>...
I have a testbench written in Verilog that opens a file and reads
source
data from it. I want to pass the name of the file to open from a
TCL
command file. According to the Verilog book I have, character
strings
can be stored in a reg variable by declaring a reg vector that is
n*8
bits long. I am using ModelSim to do the simulation. According to
the
ModelSim command reference, the "change" command can be used to set
a
Verilog reg. But, it seems that the "change" command wants a
bit-string
as the value. Is there any way to set a reg vector to a character
string using the ModelSim "change" command?

Thanks,
Charles Bailey