Seperate grounds to one logic device, acceptable?

M

MNQ

Guest
Hi All

I am after some advice. I am currently developing a product which uses a
CPLD. This will be used for the logic side of things. The product has two
identical circuit that use a common CPLD. I have one power supply with its
outputs split into two (3.3VA and 3.3VB) using inductors to separate the
supply to the two circuits. I also have two separate ground planes A and B.
The CPLD straddles the two ground planes. Circuit A needs to be as
physically/electrically separated from circuit B but use the same power
supply. How will having the cpld using grounds A and B affect the logic?
All grounds are connected to a central point using 0 ohm resistors.

Hope there is enough information here.

Thanks

Naveed
 
MNQ wrote:
Hi All

I am after some advice. I am currently developing a product which uses a
CPLD. This will be used for the logic side of things. The product has two
identical circuit that use a common CPLD. I have one power supply with its
outputs split into two (3.3VA and 3.3VB) using inductors to separate the
supply to the two circuits. I also have two separate ground planes A and B.
The CPLD straddles the two ground planes. Circuit A needs to be as
physically/electrically separated from circuit B but use the same power
supply. How will having the cpld using grounds A and B affect the logic?
All grounds are connected to a central point using 0 ohm resistors.
Click to expand...
Don't do it, at least, not without very careful analysis. Your grounds
are connected together but this does not mean that they will be at the
same instantaneous potential. If they were, you wouldn't be separating
the planes in the first place.

There are at least 3 possibilities for a chip with multiple ground
connections:

1. The ground pins connect to a common internal ground metallization on
the die. In this case you risk overloading the metallization and/or the
bond wires by adding the currents that will circulate between the planes
to the current already flowing for normal operation of the chip. Your
CPLD most likely falls into this category.

2. The device is in a BGA package and the ground pins feed into an
internal ground plane in the package. In this case, the device *most
likely* won't be damaged but you will be connecting your ground planes
together with a fairly low impedance connection.

3. The ground pins connect to separate metallization areas that the chip
designer expects to be at the same potential. Your arrangement will
allow these areas to be at voltages significantly different from what
was designed for and flaky operation, and even damage, is possible.
--
Tim Hubberstey, P.Eng. . . . . . Hardware/Software Consulting Engineer
Marmot Engineering . . . . . . . VHDL, ASICs, FPGAs, embedded systems
Vancouver, BC, Canada . . . . . . . . . . . http://www.marmot-eng.com
 
Hi Naveed,

Quite frankly I have never seen a split ground approach work well despite what
is said in some technical papers, data sheets or universities. I never design
split grounds, except in cases where total dielectric isolation must be
maintained between modules for resaons such as safety.

Besides what Tim already pointed out one unintended consequence of split grounds
is a very unpredictable EMI behavior of your system.

Regards, Joerg
http://www.analogconsultants.com
 
"Tim Hubberstey" <bogus@bogusname.com> wrote in message
news:C9Qlc.13395$LA4.12602@edtnps84...
MNQ wrote:
Hi All

I am after some advice. I am currently developing a product which uses
a
CPLD. This will be used for the logic side of things. The product has
two
identical circuit that use a common CPLD. I have one power supply with
its
outputs split into two (3.3VA and 3.3VB) using inductors to separate the
supply to the two circuits. I also have two separate ground planes A
and B.
The CPLD straddles the two ground planes. Circuit A needs to be as
physically/electrically separated from circuit B but use the same power
supply. How will having the cpld using grounds A and B affect the
logic?
All grounds are connected to a central point using 0 ohm resistors.

Don't do it, at least, not without very careful analysis. Your grounds
are connected together but this does not mean that they will be at the
same instantaneous potential. If they were, you wouldn't be separating
the planes in the first place.

snip
Click to expand...

Just to add to this, think of the current return paths for the digital
signals. If you split the plane the return paths will possibly have to
traverse some distance, causing potential problems with EMI and crosstalk.
Return paths for low frequencies take the path of least resistance, but for
high frequencies it takes the path of least inductance (i.e. minimises any
loops). Normally a ground plane (or power plane if sufficiently well
decoupled) provides a return path close to the signal, but if you split the
planes they can be forced to go elsewhere.

Generally speaking I tend to use a common ground plane to provide a low
inductance return path for all signals, and separate power planes for
analogue and digital supplies.

Mark.
 
Thanks for your thoughts. I too am unsure of how the device will behave
with split ground planes, so have arranged for a prototype to be built. I
will let you know how it goes once tested (two weeks time).

Thanks

Naveed

--
Mr Naveed Qayyum

www.mnq.org.uk

"MNQ" <corlioni1976REMOVE@yahoo.co.uk> wrote in message
news:c77vri$4re$1@rdel.co.uk...
Hi All

I am after some advice. I am currently developing a product which uses a
CPLD. This will be used for the logic side of things. The product has
two
identical circuit that use a common CPLD. I have one power supply with
its
outputs split into two (3.3VA and 3.3VB) using inductors to separate the
supply to the two circuits. I also have two separate ground planes A and
B.
The CPLD straddles the two ground planes. Circuit A needs to be as
physically/electrically separated from circuit B but use the same power
supply. How will having the cpld using grounds A and B affect the logic?
All grounds are connected to a central point using 0 ohm resistors.

Hope there is enough information here.

Thanks

Naveed
Click to expand...
 
Hello everybody

I have received my prototype and have written some programs for my cpld. I
have so far only noticed some 30mv noise on any one line. Splitting the
ground planes and having the CPLD straddle the two seems fine for my
application.

thanks

naveed

--
Mr Naveed Qayyum

www.mnq.org.uk

"MNQ" <corlioni1976REMOVE@yahoo.co.uk> wrote in message
news:c7a16v$qgp$1@rdel.co.uk...
Thanks for your thoughts. I too am unsure of how the device will behave
with split ground planes, so have arranged for a prototype to be built. I
will let you know how it goes once tested (two weeks time).

Thanks

Naveed

--
Mr Naveed Qayyum

www.mnq.org.uk

"MNQ" <corlioni1976REMOVE@yahoo.co.uk> wrote in message
news:c77vri$4re$1@rdel.co.uk...
Hi All

I am after some advice. I am currently developing a product which uses
a
CPLD. This will be used for the logic side of things. The product has
two
identical circuit that use a common CPLD. I have one power supply with
its
outputs split into two (3.3VA and 3.3VB) using inductors to separate the
supply to the two circuits. I also have two separate ground planes A
and
B.
The CPLD straddles the two ground planes. Circuit A needs to be as
physically/electrically separated from circuit B but use the same power
supply. How will having the cpld using grounds A and B affect the
logic?
All grounds are connected to a central point using 0 ohm resistors.

Hope there is enough information here.

Thanks

Naveed
Click to expand...
 
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