Search new design variables

[Stéfan Robert]

Hi,

does anyone know if there is a way to make Cadence skip the step

"search for new design variables"

each time I run Spectre for an analog simulation.

This is useful when I am defining my simulation and ommited some
variables, but when I have no more need to add new variables, I would
gladly skip this step... if possible.

Best Regards,

--
Stefan Robert
(to email: remove the numbers)

 

[fogh]

Stéfan Robert wrote:

Hi,

does anyone know if there is a way to make Cadence skip the step

"search for new design variables"

each time I run Spectre for an analog simulation.

This is useful when I am defining my simulation and ommited some
variables, but when I have no more need to add new variables, I would
gladly skip this step... if possible.

Would be nice that at least it does not catch variables with reserved names.
Like "temp"

 

[Andrew Beckett]

On Fri, 08 Jul 2005 18:04:59 +0200, fogh
<cad_support@skipthisandunderscores.catena.nl> wrote:

Stéfan Robert wrote:
Hi,

does anyone know if there is a way to make Cadence skip the step

"search for new design variables"

each time I run Spectre for an analog simulation.

This is useful when I am defining my simulation and ommited some
variables, but when I have no more need to add new variables, I would
gladly skip this step... if possible.


Would be nice that at least it does not catch variables with reserved names.
Like "temp"

There's a PCR for this:

PCR: 327275
Title: Artist treats temp as parameter instead of reserved word

In general though it does not do a "search for new design variables". What it
does do is add any design variables to the list if encountered during
netlisting. Please give an example of why you don't want it to do this. I know
of one case (other than the temp example (or "temper" in hspiceD)) that this
is required, but I'd like to make sure that if you have another reason then it
is covered in the PCRs.

Regards,

Andrew.

 

[fogh]

Andrew Beckett wrote:

On Fri, 08 Jul 2005 18:04:59 +0200, fogh
cad_support@skipthisandunderscores.catena.nl> wrote:


Stéfan Robert wrote:

Hi,

does anyone know if there is a way to make Cadence skip the step

"search for new design variables"

each time I run Spectre for an analog simulation.

This is useful when I am defining my simulation and ommited some
variables, but when I have no more need to add new variables, I would
gladly skip this step... if possible.


Would be nice that at least it does not catch variables with reserved names.
Like "temp"


There's a PCR for this:

PCR: 327275
Title: Artist treats temp as parameter instead of reserved word

In general though it does not do a "search for new design variables". What it
does do is add any design variables to the list if encountered during
netlisting. Please give an example of why you don't want it to do this. I know
of one case (other than the temp example (or "temper" in hspiceD)) that this
is required, but I'd like to make sure that if you have another reason then it
is covered in the PCRs.

The only reason is the UI consistency: there is already in ADE a menu entry
for setting temperature, and dedicated sweeps. So you can t be expected to
assign it a value yourself.
It is the same situation if you would use time in the bsource, and then the
variable would appears in ADE and require to be set. You can t be expected to
set "time", because it is swept by the analysis itself. You can only be expected
to set transient stop.

BTW, is there a bsource symbol ?

 

[Andrew Beckett]

On Mon, 11 Jul 2005 15:10:46 +0200, fogh

The only reason is the UI consistency: there is already in ADE a menu entry
for setting temperature, and dedicated sweeps. So you can t be expected to
assign it a value yourself.
It is the same situation if you would use time in the bsource, and then the
variable would appears in ADE and require to be set. You can t be expected to
set "time", because it is swept by the analysis itself. You can only be expected
to set transient stop.

BTW, is there a bsource symbol ?

No, for precisely the reason that expressions tend to confuse the netlister
into thinking that the node references (and $time) are variables.
Since you can use a "resistor" as a bsource (as a resistor) the same thing
happens there...

One day this will all work perfectly ;-)

As for the UI consistency - it's not really a case of consistency - it's just
that the netlister needs to know that certain variables are reserved words
understood by the simulator, and so they are not design variables.

The other situation I had recently was where a customer wanted to have an
include file with parameter definitions, and then use these parameters on the
schematic without the netlister finding these and adding them to the design
variables list. The solution there was to do a netlist, then delete all the
variables auto-added, and then do a run (without netlisting). Not that
clean...

Andrew.

 

[fogh]

Andrew Beckett wrote:

On Mon, 11 Jul 2005 15:10:46 +0200, fogh

The only reason is the UI consistency: there is already in ADE a menu entry
for setting temperature, and dedicated sweeps. So you can t be expected to
assign it a value yourself.
It is the same situation if you would use time in the bsource, and then the
variable would appears in ADE and require to be set. You can t be expected to
set "time", because it is swept by the analysis itself. You can only be expected
to set transient stop.

BTW, is there a bsource symbol ?

No, for precisely the reason that expressions tend to confuse the netlister
into thinking that the node references (and $time) are variables.
Since you can use a "resistor" as a bsource (as a resistor) the same thing
happens there...

One day this will all work perfectly ;-)

As for the UI consistency - it's not really a case of consistency - it's just
that the netlister needs to know that certain variables are reserved words
understood by the simulator, and so they are not design variables.

The other situation I had recently was where a customer wanted to have an
include file with parameter definitions, and then use these parameters on the
schematic without the netlister finding these and adding them to the design
variables list. The solution there was to do a netlist, then delete all the
variables auto-added, and then do a run (without netlisting). Not that
clean...

Another annoyance of this kind is when an analysis form complains that a
reference device or node does not exist, because it is not in a schematic, while
it exists in an include.