SDRAM controller design

Hi
I need to know an SDRAM controller works. I've understood the simple
controller which can work on only one bank at a time. I wanted to know
how to implement pipelining . An FSM describing the operation, or VHDL
code would be great.
Googling for SDRAM controllers returned only simple designs without
pipelining.
I'd be greateful for any links on this.
Thanx,

Neha

 

[Rob]

On Mar 2, 5:01 pm, neha.k...@gmail.com wrote:

Hi
I need to know an SDRAM controller works. I've understood the simple
controller which can work on only one bank at a time. I wanted to know
how to implement pipelining . An FSM describing the operation, or VHDL
code would be great.
Googling for SDRAM controllers returned only simple designs without
pipelining.
I'd be greateful for any links on this.
Thanx,

Neha

check out:
http://www.xilinx.com/products/design_resources/mem_corner/index.htm

...Rob