SDF Warning: INTERCONNECT -> accOutput(uphierarchy),

Hi,

Does somebody know what is the reason for the following error that I'm
getting (while running vcs) ?

SDF Warning in instance
logic_mix.FE_OCPUNCOC97857_l2_connector_ram_1_1_data_mem_d_69_ of
module HD45_SH_BFX16:
/home/dspshop/amid/prime_power/tb14/glv_db/
logic_mix.fe_rut.try8.sdf.gz:192, SDF Warning: INTERCONNECT ->
accOutput(uphierarchy), port1 (Z) DEVICE delay applied

Is there some documentation for SDF Warnings?

 

[karthik]

This warning is typically issued when one SDF interconnect delay has
to be backannotated on a net going from a device output to an output
port of one hierarchical block.

I believe Z is an output port and is connected to another output port
which is causing this warning message.

Please find the snippet from the sdf specifiacation3.0:
*****************************
3-21:
The INTERCONNECT entry is for the specification of interconnect delays
(actual or estimated) that are modeled independently for each driver-
to driven path. Both start and end points for the delay path are
specified.
Syntax
( INTERCONNECT port_instance port_instance delval_list )
The first port_instance is an output or bidirectional port.
The second port_instance is an input or bidirectional port.
delval_list is the INTERCONNECT delay between the output and input
ports.
****************

If you have access to Synopsys SolvNet page, you can find the doc for
this warning message.

https://solvnet.synopsys.com/retrieve/003691.html

Thanks & Regards,
Karthik

 

On Jan 18, 10:39 am, karthik <karthikeyan.i...@gmail.com> wrote:

This warning is typically issued when one SDF interconnect delay has
to be backannotated on a net going from a device output to an output
port of one hierarchical block.

I believe Z is an output port and is connected to another output port
which is causing this warning message.

Please find the snippet from the sdf specifiacation3.0:
*****************************
3-21:
The INTERCONNECT entry is for the specification of interconnect delays
(actual or estimated) that are modeled independently for each driver-
to driven path. Both start and end points for the delay path are
specified.
Syntax
( INTERCONNECT port_instance port_instance delval_list )
The first port_instance is an output or bidirectional port.
The second port_instance is an input or bidirectional port.
delval_list is the INTERCONNECT delay between the output and input
ports.
****************

If you have access to Synopsys SolvNet page, you can find the doc for
this warning message.

https://solvnet.synopsys.com/retrieve/003691.html

Thanks & Regards,
Karthik

Karthik,
Thanks!

Pazia