SDF Backannotation

[Steve Hamm]

Hi
I am trying to do SDF Backannotation using VerilogXL. This is one of
the SDF files i am using.
I am getting an error
Cannot annotate interconnect delay from I0.out to I4.a.
Please help me with this error
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "STFBtest")
(DATE "October 1, 2004 00:40:2")
(VENDOR "")
(PROGRAM "PEARL")
(VERSION "PEARL 4.3-p025")
(DIVIDER /)
(VOLTAGE 2.500:2.500:2.500)
(PROCESS "1.000:1.000:1.000")
(TEMPERATURE 25.000:25.000:25.000)
(TIMESCALE 1ns)
(CELL
(CELLTYPE "STFBtest")
(INSTANCE )
(DELAY
(ABSOLUTE
(INTERCONNECT B I0/a
(.100298:0.100298:0.100298)(0.100298:0.100298:0.100298))
(INTERCONNECT A I0/b (0.100277:0.100277:0.100277)
(0.100277:0.100277:0.100277))
(INTERCONNECT I4/out C (0.100010:0.100010:0.100010)
(0.100010:0.100010:0.100010))
(INTERCONNECT I0/out I4/a (0.000300:0.000300:0.000300)
(0.000300:0.000300:0.000300))
)
)
)
(CELL
(CELLTYPE "INV1X")
(INSTANCE I4)
(DELAY
(ABSOLUTE
(IOPATH a out (1.136806:1.136806:1.136806)
(1.251445:1.251445:1.251445))
)
)
)
(CELL
(CELLTYPE "NAND2X2")
(INSTANCE I0)
(DELAY
(ABSOLUTE
(IOPATH a out (1.128328:1.128328:1.128328)
(1.138328:1.138328:1.138328))
(IOPATH b out (1.128328:1.128328:1.128328)
(1.138328:1.138328:1.138328))
)

Thanks in advance for your help
Steve
)
)
)