sdf annotation

[balaji286@gmail.com]

hi
when i do back annotation of the sdf file which i obtain from rtl
compiler 4.2 i try to back annotate it using $sdf_annotate
(tool)system task on the mapped file genearted by rtl compiler 4.2
which i compile using ncvlog command along with tsmc18.v.
now when i do this i get only the delays specified in the sdf file and
not the delays specified in the tsmc18.v using specparams why is it so.
more over in the sdf files even for combination io paths posedge and
negedge keywords are present which i believe is causing the warnings
one of which i have cut and pasted,please help in this regard.

ncelab: *W,SDFNEP: Failed Attempt to annotate to non-existent path
(COND (B==1) (IOPATH (posedge A) Y)) of instance
test_verilog_test.UUT.g153 of module XNOR2X1
<./sdf_files/verilog_test.sdf, line 411>.

regards
balaji

 

[m]

On 15 Nov 2005 21:52:07 -0800, "balaji286@gmail.com"
<balaji286@gmail.com> wrote:

ncelab: *W,SDFNEP: Failed Attempt to annotate to non-existent path
(COND (B==1) (IOPATH (posedge A) Y)) of instance
test_verilog_test.UUT.g153 of module XNOR2X1
./sdf_files/verilog_test.sdf, line 411>.

This one is easy. You need to remove the "posedge" A. If you look at
the tsmc18.v you will see that the specparam doesn't have an edge
specifier which is causing the annoation to fail because the right
slot type doesn't exist. You can do the following in VI command line:

1,$s/PATH (...edge \(.*\))/PATH \1/