schematic to layout

[supra]

Hi,
I am trying to develop the schematic to layout . I would like some
leads on how to create layout from the cells from the schematic

It is digital and analog but not semiconductor electronics. It is
superconducting electronics and cadence cells developed in my group
and both layout and schematic. So the netlist is a hierarchical
netlist. I am trying to do a schematic driven layout. But i want to
automate
it.

 

[Suresh Jeevanandam]

supra wrote:

Hi,
I am trying to develop the schematic to layout . I would like some
leads on how to create layout from the cells from the schematic

It is digital and analog but not semiconductor electronics. It is
superconducting electronics and cadence cells developed in my group
and both layout and schematic. So the netlist is a hierarchical
netlist. I am trying to do a schematic driven layout. But i want to
automate
it.

If you have VirtuosoXL license and have the standard cells XL

compatible, you can use Tool->LayoutXL for schematic driven layout
design. However, you still would have to create the interconnects
yourself, the tool will only assist you by tracking connectivity and
highlighting nets to be connected.
If you are going to use XL, try out the following,
Design->Gen From Source, To start with the placement of the devices
Connectivity->Show Incomplete Nets
If you want to automate routing itself, look at Virtuoso Custom Router
and Neocell in the cadence documentation.
--
Suresh