schematic from parasitic extraction

[Alex Gerdemann]

I've created a schematic, done the layout with Layout XL, and then run
a parasitic extraction through Assura. This generates a bunch of
parasitic components which are displayed in a layout view. In this
view, my routing has all been eliminated (and the parasitic components
are tiny), so it is very difficult to figure out where the parasitic
elements are supposed to be connected. In the Analog Environment
window, I can then generate a netlist and do simulations. (I do this
by inserting the parasitic extracted view into the "switch view list"
set under Setup-Environment.) It would be nice to place the parasitic
components back in the schematic, so I can see where they are supposed
to go without pouring through a difficult to read netlist. Is this
possible? Alternatively, is there some way to change the display
settings in the layout editor so it's obvious where the parasitics are
connecting?

Thanks,

Alex Gerdemann

 

[S. Badel]

Hi,

1) Use Assura->MSPS, then backannotating to annotate
parasitics values as text on the schematic.

2) Modify the LVS rules file to include saveInterconnect() rules
for the layers you want to see in the extracted view.

hope this helps,

stéphane

Alex Gerdemann wrote:

I've created a schematic, done the layout with Layout XL, and then run
a parasitic extraction through Assura. This generates a bunch of
parasitic components which are displayed in a layout view. In this
view, my routing has all been eliminated (and the parasitic components
are tiny), so it is very difficult to figure out where the parasitic
elements are supposed to be connected. In the Analog Environment
window, I can then generate a netlist and do simulations. (I do this
by inserting the parasitic extracted view into the "switch view list"
set under Setup-Environment.) It would be nice to place the parasitic
components back in the schematic, so I can see where they are supposed
to go without pouring through a difficult to read netlist. Is this
possible? Alternatively, is there some way to change the display
settings in the layout editor so it's obvious where the parasitics are
connecting?

Thanks,

Alex Gerdemann

 

[G Vandevalk]

Alex Gerdemann wrote:

I've created a schematic, done the layout with Layout XL, and then run
a parasitic extraction through Assura. This generates a bunch of
parasitic components which are displayed in a layout view. In this
view, my routing has all been eliminated (and the parasitic components

The routing is simply not copied to the extracted view. If you own the
extract deck, this step is trivial

are tiny), so it is very difficult to figure out where the parasitic
elements are supposed to be connected. In the Analog Environment

It is possible to "scale up" the parasitic components ( but only if you
own the technology )

window, I can then generate a netlist and do simulations. (I do this
by inserting the parasitic extracted view into the "switch view list"
set under Setup-Environment.) It would be nice to place the parasitic

nice? clearly you do not get several thousand parasitics per net ...

components back in the schematic, so I can see where they are supposed
to go without pouring through a difficult to read netlist. Is this
possible? Alternatively, is there some way to change the display
settings in the layout editor so it's obvious where the parasitics are
connecting?

Try turning net display on in your extracted view. If your circuit is
small, and you only have a few
parasitics, this can sometimes be useful.

( but it would be great if this capability could also hide specific nets
like supplies !!!!)

Thanks,

Alex Gerdemann