F
FPGA
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Hello All,
I am using the UNIFORM procedure in VHDL to generate random numbers.
UNIFORM generates random numbers in the range 0.1 to 0.99999. I wish
to generate random signed and unsigned numbers of variable
widths(integer range). I would like to get some ideas on how I should
scale this data? Right now, when i convert the real output from real
to integer to signed, it just gives me an output of wither 0 or 1 .
Your comments would be appreciated
Thank you
I am using the UNIFORM procedure in VHDL to generate random numbers.
UNIFORM generates random numbers in the range 0.1 to 0.99999. I wish
to generate random signed and unsigned numbers of variable
widths(integer range). I would like to get some ideas on how I should
scale this data? Right now, when i convert the real output from real
to integer to signed, it just gives me an output of wither 0 or 1 .
Your comments would be appreciated
Thank you