RLC

J

jason

Guest
Hello All
Say I have a resistor R, inductor L and capacitor C connected together
in series

The easiest way to find the total impedance is just plug the formula
a+ bj

Z= square root (a^2 + b^2 )

without drawing any phasor diagram right?

For example
R + Xc + XL = R + jwL - (j /wC)
= R + j (wL - (1/wC)
= a + j b

so Z total is square root( a^2 + b^2 )

Am I right?

Can I always plug in equation square root( a^2 + b^2 ) without drawing
a phasor diagram?
If cannot what is the reason and any example to explain it?

Kindly enlighthen

Thank you


Jason
 
Yes that's right Garth ,.. Thank you

Sometimes in some cases, we compare the reactance of a capacitor with
resistance of a resistance like the below case

1/wC << Rs

So my question is , what does it mean by this comparison?
reactance < resistance

What does it tell us?

Should not we compare resistance with resistance
while comparing reactance with reactance
Both of them have the unit ohm?

What is the implication of using such a comparison , what does it tell
us?

Thank you
 
jason wrote:
Yes that's right Garth ,.. Thank you

Sometimes in some cases, we compare the reactance of a capacitor with
resistance of a resistance like the below case

1/wC << Rs

So my question is , what does it mean by this comparison?
reactance < resistance

What does it tell us?

Should not we compare resistance with resistance
while comparing reactance with reactance
Both of them have the unit ohm?

What is the implication of using such a comparison , what does it
tell
us?

Thank you
Click to expand...
When using AC-coupling between stages, the coupling capacitors can form
unwanted high-pass filters, unless the reactance is negligible compared
to the source resistance.

Consider the RC high-pass filter:

----C-----+---
|
R
|
----------+---

Transfer function = sCR / (1+sCR)

At high frequencies Vout/Vin = 1 and phase = 0;
At the break-point, phase is 45 degrees and output is 3dB down;
Below the break-frequency, output falls at -20dB per decade.

The break frequency is w = 1/RC

So, Vout/Vin = 1 when 1/wC << R
 
Andrew Holme wrote:
When using AC-coupling between stages, the coupling capacitors can
form
unwanted high-pass filters, unless the reactance is negligible
compared
to the source resistance.
Click to expand...
Perhaps I should say: compared to load resistance.

Another time you might want 1/wC << Rs would be when selecting
decoupling capacitors. Here, it is the source resistance we are
concerned with, and we are forming a low-pass filter with a VERY low
break frequency.
 
Hi Andrew and Garth
Thanks a lot for the help.
Always gald to see positive guides from you all

Well my case is the Rs at source node of a nmos, and a tap capacitor is
connect to the top end of Rs.
So it is using 1/wc <<Rs

I was wondering why
Thats all
Other than the above explanation, is there anything can be added to my
case?

Thank you so much
I have learnt so much from you all
Cheers

jason
 
by the way, mine is to create an oscillating circuit using nmosfet, tap
capacitor, inductor as feedback.
Kindly enlighthen if there is anything else to be added
Thank you so much Garth and Andrew
 
Rs is the total ac resistance of cource and also resistance connecting
source node and ground.
I do for my assignment
:)
 
I got my circuit oscillating but do not know how to do hand calculation
to prove it
.. so wish to know the reason for 1/wc<<Rs
 
I am sorry for my lacking in basic knowledge, why when XL and Xc cancel
, we can get 180 degree phase shift?

Also the drop across the node is low meaning the current to Rs is low?

AM I right?
Thank you Garth
 
Hi Garth

Thank you
My understand is most current will be in the tank circuit no matter it
is series or parallel LC tank.
That means I am wrong?

Say for a nmos transistor, where its source node is connected to a tap
capacitor as a feedback. Then with the tap capacitors, a inductor in
series with a capacitor is connected in parallel to the earlier
mentioned tap capacitors.
They form a clapp LC osccilator with feeedback to the source node.
For the nmos, the source node is connected to a resistor named Rs.

So this case is a parallel LC tank, is it?
If yes, the condition 1/wc<< Rs still hold . This simply means the
current must flow to the LC tank circuit for the oscillating operation
when the XC=XL.
So voltage drop across Rs is small.
Is it right for my understanding?

So when it is series LC tank circuit or only a 2 capacitor with
inductor in parallel case, what will this be different?

One thing I wish to enquire, that is, what actually it helps in
osccilator when XC=XL, both impedance are the same, so what will it
help in this case?

I wish you could help me in understanding this.
Thank you Garth

I apologise for the inconveniences caused

Thanks a lot

jason
 
Hi garth

Thank you
That is really a helpful explanation
I learnt about parallel LC tank only. I wonder what physics that lies
behind the series LC tank to make the max current to flow to the rest
of oscillator circuit without keeping most current in the LC tank(like
in paralle)

By the wayI tried to email you but it failed.
Is your mail box full?


Thank you so much for the help
Will write again if there is any arising doubts :0
cheers

rgds and thanks
jason
 
"jason" <cheanglong@gmail.com> wrote in message
news:1113025264.931774.140320@g14g2000cwa.googlegroups.com...
Hi garth

Thank you
That is really a helpful explanation
I learnt about parallel LC tank only. I wonder what physics that lies
behind the series LC tank to make the max current to flow to the rest
of oscillator circuit without keeping most current in the LC tank(like
in paralle)

By the wayI tried to email you but it failed.
Is your mail box full?


Thank you so much for the help
Will write again if there is any arising doubts :0
cheers

rgds and thanks
jason
Click to expand...
The email is fake, the name and email derive from an early Star Trek
episode.
What's up? Feel free to ask here, I don't mind!

My generic excite email got a netsky infected email the other day, so much
for
their "spam" filters.

Caps / inductors and op-amps can be fun. I built a high gain amp while in
school,
connected it to a geophone and jammed it into a knot hole in the wooden
floor.
Scoping the output, I was able to detect a person walking up to the
electronics
building at night when the campus was quiet.
 
Thanks Garth

My doubt is
" I wonder what physics that lies
behind the series LC tank to make the max current to flow to the rest
of oscillator circuit without keeping most current in the LC tank(like
in parallel)

"

Jason
 
Hi Garth

Thank you so much
I learnt so much from you and other kind people up there :)
So that means for parallel LC , there is a existing loop within itself.
Therefore, it will keep the current in the parallel LC tank rather than
let it flow to the active circuit?
:)
Thank you


Jason
 
Hi Garth

Thank you so much
I learnt so much from you and other kind people up there :)
So that means for parallel LC , there is a existing loop within itself.
Therefore, it will keep the current in the parallel LC tank rather than
let it flow to the active circuit?

For parallel LC tank, the gain of the active circuit must be greater
than 1. Then the initial loop gain must be greater than
1(theoritically, in practical is at least 2)

For series LC tank, what is the condition, do you know?

Thank you


Jason
 
Hi Garth

Thank you so much
I learnt so much from you and other kind people up there :)
So that means for parallel LC , there is a existing loop within itself.
Therefore, it will keep the current in the parallel LC tank rather than
let it flow to the active circuit?

For parallel LC tank, the gain of the active circuit must be greater
than 1. Then the initial loop gain must be greater than
1(theoritically, in practical is at least 2)

For series LC tank, what is the condition, do you know?

Thank you


Jason
 
Thank you Garth
It is my honour to have learnt so much from you
:)
Thanks a lot and wish you good luck

rgds and thanks
Jason
 
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