rise and fall time

M

M. Smile

Guest
Hello everyone,

using a CMOS counter like 4518, I know that a maximum rise and fall time of
15us (with Vcc=5V) must be repected to the edge-triggered clock input.
But how about the reset input, I find no obvious information. I would like
to use a 1mS rise and fall time for that input.
Is it ok to use that long rise/fall time?

Thanks!
M.S.
 
M. Smile wrote:
Hello everyone,

using a CMOS counter like 4518, I know that a maximum rise and fall time of
15us (with Vcc=5V) must be repected to the edge-triggered clock input.
But how about the reset input, I find no obvious information. I would like
to use a 1mS rise and fall time for that input.
Is it ok to use that long rise/fall time?
Click to expand...
It depends- this would not be advisable if the clocks are applied at the
same time.
 
In general, it is **never** a good thing to have a slow rising signal
on a CMOS (in particular) input, unless it's a schmitt trigger. In this
case, that is probably not so.

Looking at the TI datasheet

http://focus.ti.com/lit/ds/symlink/cd4518b.pdf

you will notice the reset input is buffered with a gate, so you can get
away with something slower, but I am not sure I would say you can use
1mS for that input.

If you need a slow rise time (for other circuit issues), I would
suggest using a buffer with a schmitt trigger input to drive the reset
pin.

Cheers

PeteS
 
"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42E25412.9090000@nospam.com...
M. Smile wrote:
Hello everyone,

using a CMOS counter like 4518, I know that a maximum rise and fall time
of 15us (with Vcc=5V) must be repected to the edge-triggered clock input.
But how about the reset input, I find no obvious information. I would
like to use a 1mS rise and fall time for that input.
Is it ok to use that long rise/fall time?

It depends- this would not be advisable if the clocks are applied at the
same time.
Click to expand...
No clock would be applied.
It is a cheap way I'm experimenting to send clock pulses or reset pulse on
the same line: clock input directly connected to this line and reset input
through a 1mS RC filter. Sending short pulses (14uS on/46uS off in my case)
would not be enough to rise significative voltage on reset input after the
RC filter but clock input would work as intended. On the other hand, sending
a long pulse (say 5mS to be sure) would rise voltage enough at reset input
to reset the counter.

M.S.
 
M. Smile wrote:
"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42E25412.9090000@nospam.com...


M. Smile wrote:

Hello everyone,

using a CMOS counter like 4518, I know that a maximum rise and fall time
of 15us (with Vcc=5V) must be repected to the edge-triggered clock input.
But how about the reset input, I find no obvious information. I would
like to use a 1mS rise and fall time for that input.
Is it ok to use that long rise/fall time?

It depends- this would not be advisable if the clocks are applied at the
same time.


No clock would be applied.
It is a cheap way I'm experimenting to send clock pulses or reset pulse on
the same line: clock input directly connected to this line and reset input
through a 1mS RC filter. Sending short pulses (14uS on/46uS off in my case)
would not be enough to rise significative voltage on reset input after the
RC filter but clock input would work as intended. On the other hand, sending
a long pulse (say 5mS to be sure) would rise voltage enough at reset input
to reset the counter.

M.S.
Click to expand...
Very clever! That will work- just be sure that some other logic is not
doing something with your counter outputs- they may not all go to '0' at
the same time- there will be no problem coming out of reset.
 
On Sat, 23 Jul 2005 13:27:28 -0400, "M. Smile" <msmile9@yahoo.com>
wrote:

"Fred Bloggs" <nospam@nospam.com> wrote in message
news:42E25412.9090000@nospam.com...


M. Smile wrote:
Hello everyone,

using a CMOS counter like 4518, I know that a maximum rise and fall time
of 15us (with Vcc=5V) must be repected to the edge-triggered clock input.
But how about the reset input, I find no obvious information. I would
like to use a 1mS rise and fall time for that input.
Is it ok to use that long rise/fall time?

It depends- this would not be advisable if the clocks are applied at the
same time.

No clock would be applied.
It is a cheap way I'm experimenting to send clock pulses or reset pulse on
the same line: clock input directly connected to this line and reset input
through a 1mS RC filter. Sending short pulses (14uS on/46uS off in my case)
would not be enough to rise significative voltage on reset input after the
RC filter but clock input would work as intended. On the other hand, sending
a long pulse (say 5mS to be sure) would rise voltage enough at reset input
to reset the counter.

M.S.
Click to expand...
That should work fine. Except that 14/(46+14) is 0.23, so the reset
line could rise to Vcc*0.23 during clocking, probably safe but a bit
high for comfort.

John
 
Hello M. Smile,

No clock would be applied.
It is a cheap way I'm experimenting to send clock pulses or reset pulse on
the same line: clock input directly connected to this line and reset input
through a 1mS RC filter. Sending short pulses (14uS on/46uS off in my case)
would not be enough to rise significative voltage on reset input after the
RC filter but clock input would work as intended. On the other hand, sending
a long pulse (say 5mS to be sure) would rise voltage enough at reset input
to reset the counter.
Click to expand...
For greater peace of mind I would look into adding a CD40106 Schmitt
inverter before each input. For the reset that would be after the RC
filter. It is cheap. Just keep in mind that now the assertion levels
will be inverted.

I have done a lot of slope dependent and duration dependent switching
with CD40106 chips. They are great.

Regards, Joerg

http://www.analogconsultants.com
 
"Joerg" <notthisjoergsch@removethispacbell.net> wrote in message
news:EdyEe.6238$_%4.1894@newssvr14.news.prodigy.com...
Hello M. Smile,

No clock would be applied.
It is a cheap way I'm experimenting to send clock pulses or reset pulse
on the same line: clock input directly connected to this line and reset
input through a 1mS RC filter. Sending short pulses (14uS on/46uS off in
my case) would not be enough to rise significative voltage on reset input
after the RC filter but clock input would work as intended. On the other
hand, sending a long pulse (say 5mS to be sure) would rise voltage enough
at reset input to reset the counter.

For greater peace of mind I would look into adding a CD40106 Schmitt
inverter before each input. For the reset that would be after the RC
filter. It is cheap. Just keep in mind that now the assertion levels will
be inverted.

I have done a lot of slope dependent and duration dependent switching with
CD40106 chips. They are great.
Click to expand...
I may consider this if it proves to be unreliable.
I'm just trying to do as much as possible with less chips, otherwise I go
with microcontrollers.

Thanks!
M.S.


Regards, Joerg

http://www.analogconsultants.com
Click to expand...
 
Hello M. Smile,

< CD40106 before counter >

I may consider this if it proves to be unreliable.
I'm just trying to do as much as possible with less chips, otherwise I go
with microcontrollers.
Click to expand...
Unreliable can mean all sorts of things here. It might work, and then
some day it doesn't work with the next batch of chips. Or it might work
and then quit when the chip temperature reaches some extreme. Going
beyond the transition times outlined in the family spec is like playing
the lottery.

Regards, Joerg

http://www.analogconsultants.com
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top