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I don't recall where, but there was a conversation recently about using
the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about using
the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and there
are more than one version for FPGAs. I would hope they had a version
similar to the ARM CM-1 which is specifically targeted to programmable
logic and not overly large. I haven't seen any indication this exists,
but it is hard to find this type of info. Or I'm just not looking in
the right places.
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and there
are more than one version for FPGAs. I would hope they had a version
similar to the ARM CM-1 which is specifically targeted to programmable
logic and not overly large. I haven't seen any indication this exists,
but it is hard to find this type of info. Or I'm just not looking in
the right places.
On Sat, 29 Apr 2017 23:04:28 -0400, rickman wrote:
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and there
are more than one version for FPGAs. I would hope they had a version
similar to the ARM CM-1 which is specifically targeted to programmable
logic and not overly large. I haven't seen any indication this exists,
but it is hard to find this type of info. Or I'm just not looking in
the right places.
Googling RISC-V FPGA implementation got lots of hits.
On Sat, 29 Apr 2017 23:04:28 -0400, rickman wrote:
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and there
are more than one version for FPGAs. I would hope they had a version
similar to the ARM CM-1 which is specifically targeted to programmable
logic and not overly large. I haven't seen any indication this exists,
but it is hard to find this type of info. Or I'm just not looking in
the right places.
They claim to have a minimal variant of the instruction set, which would
presumably be an FPGA-ish sort of thing. But I only read about 20 pages
into the instruction set document.
It's OPEN SOURCE! You could get cracking and make one!! (Well, so could
I, theoretically, if I were insane).
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and there
are more than one version for FPGAs. I would hope they had a version
similar to the ARM CM-1 which is specifically targeted to programmable
logic and not overly large. I haven't seen any indication this exists,
but it is hard to find this type of info. Or I'm just not looking in
the right places.
Too many, with all that I checked having little value. I've never
understood why people go to all the trouble of designing modules and
making them publicly available without significant documentation that
explains what was done and why. In some 10 or 12 links I was not able
to find a single overview of what the project is about, where it is
currently and where it is headed.
On 4/30/2017 12:35 AM, Tim Wescott wrote:
On Sat, 29 Apr 2017 23:04:28 -0400, rickman wrote:
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and
there are more than one version for FPGAs. I would hope they had a
version similar to the ARM CM-1 which is specifically targeted to
programmable logic and not overly large. I haven't seen any
indication this exists, but it is hard to find this type of info. Or
I'm just not looking in the right places.
They claim to have a minimal variant of the instruction set, which
would presumably be an FPGA-ish sort of thing. But I only read about
20 pages into the instruction set document.
I found reference to there being as many as three variants implemented
in FPGAs, but I don't think any are intended for use in FPGAs. Rather I
believe these are just test designs along the road to the ASIC which
would seem to be out and available on a board for not too much money.
It's OPEN SOURCE! You could get cracking and make one!! (Well, so
could I, theoretically, if I were insane).
If I wrote one it would be a very simple implementation which would
likely require lots of clock cycles to complete anything. But then
maybe my impression of the design is not very accurate. I picture it as
something very much more complex than the simple and fast stack
processors I am used to working with.
On 4/30/2017 12:38 AM, Tim Wescott wrote:
On Sat, 29 Apr 2017 23:04:28 -0400, rickman wrote:
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and
there are more than one version for FPGAs. I would hope they had a
version similar to the ARM CM-1 which is specifically targeted to
programmable logic and not overly large. I haven't seen any
indication this exists, but it is hard to find this type of info. Or
I'm just not looking in the right places.
Googling RISC-V FPGA implementation got lots of hits.
Too many, with all that I checked having little value. I've never
understood why people go to all the trouble of designing modules and
making them publicly available without significant documentation that
explains what was done and why. In some 10 or 12 links I was not able
to find a single overview of what the project is about, where it is
currently and where it is headed.
On Sun, 30 Apr 2017 01:46:54 -0400, rickman wrote:
On 4/30/2017 12:38 AM, Tim Wescott wrote:
On Sat, 29 Apr 2017 23:04:28 -0400, rickman wrote:
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and
there are more than one version for FPGAs. I would hope they had a
version similar to the ARM CM-1 which is specifically targeted to
programmable logic and not overly large. I haven't seen any
indication this exists, but it is hard to find this type of info. Or
I'm just not looking in the right places.
Googling RISC-V FPGA implementation got lots of hits.
Too many, with all that I checked having little value. I've never
understood why people go to all the trouble of designing modules and
making them publicly available without significant documentation that
explains what was done and why. In some 10 or 12 links I was not able
to find a single overview of what the project is about, where it is
currently and where it is headed.
That's typical of open-source projects: functionality is fun; good
documentation is at least as time-consuming as good code (HDL or
software), and documentation-writing isn't nearly as fun.
For cutting-edge open-source stuff the key to success is to find the web
forum or mailing list that covers the subject, and to start asking
questions. I suppose that if I won the lottery and didn't get seduced by
Tahiti I'd pick a project and just write documentation.
On 30/04/17 16:39, Tim Wescott wrote:
On Sun, 30 Apr 2017 01:46:54 -0400, rickman wrote:
On 4/30/2017 12:38 AM, Tim Wescott wrote:
On Sat, 29 Apr 2017 23:04:28 -0400, rickman wrote:
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and
there are more than one version for FPGAs. I would hope they had a
version similar to the ARM CM-1 which is specifically targeted to
programmable logic and not overly large. I haven't seen any
indication this exists, but it is hard to find this type of info. Or
I'm just not looking in the right places.
Googling RISC-V FPGA implementation got lots of hits.
Too many, with all that I checked having little value. I've never
understood why people go to all the trouble of designing modules and
making them publicly available without significant documentation that
explains what was done and why. In some 10 or 12 links I was not able
to find a single overview of what the project is about, where it is
currently and where it is headed.
That's typical of open-source projects: functionality is fun; good
documentation is at least as time-consuming as good code (HDL or
software), and documentation-writing isn't nearly as fun.
For cutting-edge open-source stuff the key to success is to find the web
forum or mailing list that covers the subject, and to start asking
questions. I suppose that if I won the lottery and didn't get seduced by
Tahiti I'd pick a project and just write documentation.
Or you find a company (ideally run by at least some of the people behind
the open source project) that will provide you with support,
documentation, demos, point-and-click installations (especially for
Windows), etc. - all for a bit of money. When it works well, it can
give you all the benefits of a good open source project, /and/ all the
benefits of a good commercial project, for a price somewhere in between.
I don't know if there is such commercial support available for RISC-V -
but if it gets popular enough, then I am sure there will be.
For cutting-edge open-source stuff the key to success is to find the web
forum or mailing list that covers the subject, and to start asking
questions. I suppose that if I won the lottery and didn't get seduced by
Tahiti I'd pick a project and just write documentation.
An older version of the Risc V processor generator is here:
https://github.com/ucb-bar/riscv-sodor
This is the 1 stage version:
https://github.com/ucb-bar/riscv-sodor/tree/master/src/rv32_1stage
A more recent version by the same group seems to be this BOOM Risc V which is synthesizable.
https://github.com/ucb-bar/riscv-boom
This presentation seems to cover all versions:
https://riscv.org/wp-content/uploads/2016/01/Wed1345-RISCV-Workshop-3-BOOM.pdf
The CPU is implemented in Chisel which is a scala library that compiles to Verilog or C++.
https://chisel.eecs.berkeley.edu/2.2.0/getting-started.html
rickman <gnuarm@gmail.com> wrote:
Too many, with all that I checked having little value. I've never
understood why people go to all the trouble of designing modules and
making them publicly available without significant documentation that
explains what was done and why. In some 10 or 12 links I was not able
to find a single overview of what the project is about, where it is
currently and where it is headed.
https://www2.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-146.pdf
is the manifesto.
On Sun, 30 Apr 2017 01:46:54 -0400, rickman wrote:
On 4/30/2017 12:38 AM, Tim Wescott wrote:
On Sat, 29 Apr 2017 23:04:28 -0400, rickman wrote:
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about
using the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and
there are more than one version for FPGAs. I would hope they had a
version similar to the ARM CM-1 which is specifically targeted to
programmable logic and not overly large. I haven't seen any
indication this exists, but it is hard to find this type of info. Or
I'm just not looking in the right places.
Googling RISC-V FPGA implementation got lots of hits.
Too many, with all that I checked having little value. I've never
understood why people go to all the trouble of designing modules and
making them publicly available without significant documentation that
explains what was done and why. In some 10 or 12 links I was not able
to find a single overview of what the project is about, where it is
currently and where it is headed.
That's typical of open-source projects: functionality is fun; good
documentation is at least as time-consuming as good code (HDL or
software), and documentation-writing isn't nearly as fun.
For cutting-edge open-source stuff the key to success is to find the web
forum or mailing list that covers the subject, and to start asking
questions. I suppose that if I won the lottery and didn't get seduced by
Tahiti I'd pick a project and just write documentation.
On 4/28/2017 9:56 PM, Tim Wescott wrote:
On Fri, 28 Apr 2017 14:54:06 -0400, rickman wrote:
I don't recall where, but there was a conversation recently about using
the RISC-V in FPGAs. Thought I'd pass on the link.
https://www.microsemi.com/products/fpga-soc/technology-solutions/
embedded-processing/risc-v
Ooh, cool. I'm going to have to keep my eye on the RISC-V.
I don't know how small the RISC-V can be made. I know there is a
version designed in an ASIC that can compete with the ARM CPUs and there
are more than one version for FPGAs. I would hope they had a version
similar to the ARM CM-1 which is specifically targeted to programmable
logic and not overly large. I haven't seen any indication this exists,
but it is hard to find this type of info. Or I'm just not looking in
the right places.
That's typical of open-source projects: functionality is fun; good
documentation is at least as time-consuming as good code (HDL or
software), and documentation-writing isn't nearly as fun.
For cutting-edge open-source stuff the key to success is to find the web
forum or mailing list that covers the subject, and to start asking
questions. I suppose that if I won the lottery and didn't get seduced by
Tahiti I'd pick a project and just write documentation.
I suppose this is one reason that Octave works so well for me: when I have a question, I consult the Matlab documentation. That makes feel a little guilty. I've found Octave is actually faster on a lot of my scripts though..
A basic RV32I (the minimal 32 bit user-mode instruction set) is very simple.
Here's one that's about 400 lines of SystemVerilog, that was designed by a
student over a few weeks as a summer project:
https://github.com/ucam-comparch/clarvi
Theo