RISC model

  • Thread starter Joaquín Gracia
  • Start date
J

Joaquín Gracia

Guest
Hello all,

I'm loking for a VHDL model of a RSIC microcontroller. I have downloaded
a model from www.opencores.org, but it is behavioural. I'm triying to
find a structural (or something behavioural with structural parts) model.

Can someone help me?


Thank you very much, my best regards.
 
Joaquín Gracia wrote:

I'm loking for a VHDL model of a RSIC microcontroller. I have downloaded
a model from www.opencores.org, but it is behavioural. I'm triying to
find a structural (or something behavioural with structural parts) model.
Click to expand...
What would you do if you had such a model?

-- Mike Treseler
 
Hi,

Joaquín Gracia wrote:
I'm loking for a VHDL model of a RSIC microcontroller. I have downloaded
a model from www.opencores.org, but it is behavioural. I'm triying to
find a structural (or something behavioural with structural parts) model.
Click to expand...
What about the Leon processor? (www.gaisler.com)
Its a free Sparc compliant processor core.

bye Thomas

--
Emailantworten bitte an thomas[at]obige_domain.
Usenet_10 ist für Viren und Spam reserviert
 
I would suggested you do a search for one of the many PIC16C54
implementations available on the internet,

Hans.
www.ht-lab.com



"Joaquín Gracia" <jgracia@disca.upv.es> wrote in message
news:d0hddf$d4f$1@electra.cc.upv.es...
| Hello all,
|
| I'm loking for a VHDL model of a RSIC microcontroller. I have downloaded
| a model from www.opencores.org, but it is behavioural. I'm triying to
| find a structural (or something behavioural with structural parts) model.
|
| Can someone help me?
|
|
| Thank you very much, my best regards.
 
Mike Treseler escribió:
Joaquín Gracia wrote:

I'm loking for a VHDL model of a RSIC microcontroller. I have
downloaded a model from www.opencores.org, but it is behavioural. I'm
triying to find a structural (or something behavioural with structural
parts) model.


What would you do if you had such a model?

-- Mike Treseler
Click to expand...
My intention is to study how a fault can be propagated from
combinational logic to registers, and how this fault can affect the
behaviour of the microcontroller and the workload results.

We have written two papers about this issue, working with a version of
the PIC and another one of the 8051, and we would like to try with
different models.

Joaquin
 
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