B
Blackie Beard
Guest
Has anyone here played with Thomas Coonan's risc-8
(free verilog clone of pic16c57 mcu). I wasn't sure, but
simulation of it seems to indicate a bug. I can't seem
to contact Mr. Coonan by his email addresses from his
website (cutting out the anti-spam portion).
I could be wrong, but there seems to be a problem in
the logic for goto. I suppose I could remedy this by
making the first code in any jumpable location to be NOP.
in cpu.v at one point, there is this:
if (skip == 1'b1) begin
inst <= 12'b000000000000; // FORCE NOP
Then later there this comment:
// Remember that the skip instructions work by inserting
// a NOP instruction or not into program stream and don't
// change the PC.
But in the place where the program counter is coded in, there is no
functionality dependant upon the "skip" signal.
My S/W works on MPSim tool. I have a section doing a bit test
which does or doesn't (depending on bit) perform "goto" to three
locations back. The first part within the loop is to read TMR0
into W, then I check whether it's zero, when it's zero I fall out of
the loop. However, the first time through the loop it loads TMR0
into W, but after that a NOP is executed (not in addition to the
movf TMR0 to W reg, but instead of it).
Is it possible that there needs to be some hook in the pc_in block
that will not allow pc to increment if skip is active? Here is the
sequence from the list file, which executes in risc-8 as an endless
loop:
000B 0201 00067 loop movf TMR0, W ; move tmr0 to w
000C 0743 00068 btfss STATUS, Z ; fall out if tmr0 = 0
000D 0A0B 00069 goto loop ; else loop back
Thanks for any insight,
BB
(free verilog clone of pic16c57 mcu). I wasn't sure, but
simulation of it seems to indicate a bug. I can't seem
to contact Mr. Coonan by his email addresses from his
website (cutting out the anti-spam portion).
I could be wrong, but there seems to be a problem in
the logic for goto. I suppose I could remedy this by
making the first code in any jumpable location to be NOP.
in cpu.v at one point, there is this:
if (skip == 1'b1) begin
inst <= 12'b000000000000; // FORCE NOP
Then later there this comment:
// Remember that the skip instructions work by inserting
// a NOP instruction or not into program stream and don't
// change the PC.
But in the place where the program counter is coded in, there is no
functionality dependant upon the "skip" signal.
My S/W works on MPSim tool. I have a section doing a bit test
which does or doesn't (depending on bit) perform "goto" to three
locations back. The first part within the loop is to read TMR0
into W, then I check whether it's zero, when it's zero I fall out of
the loop. However, the first time through the loop it loads TMR0
into W, but after that a NOP is executed (not in addition to the
movf TMR0 to W reg, but instead of it).
Is it possible that there needs to be some hook in the pc_in block
that will not allow pc to increment if skip is active? Here is the
sequence from the list file, which executes in risc-8 as an endless
loop:
000B 0201 00067 loop movf TMR0, W ; move tmr0 to w
000C 0743 00068 btfss STATUS, Z ; fall out if tmr0 = 0
000D 0A0B 00069 goto loop ; else loop back
Thanks for any insight,
BB