RF RECEIVER

[naveen]

Hi all,

iam a graduate student in VLSI design and interested in RF design
we are using cadence 0.18 um technology . i would like to know some of
the sources for "RF RECIEVER DESIGN".

regards,
naveen

 

[John Gianni]

cvmnk@yahoo.com (naveen) wrote in message news:<b7f5eb6a.0310300834.4a79447@posting.google.com>...

I am a graduate student in VLSI design and interested in RF design
we are using cadence 0.18 um technology . i would like to know some of
the sources for "RF RECIEVER DESIGN".

Did you pick up the Cadence "Eaglet" test chip from the university site:
http://crete.cadence.com

It contains a very simple .18um RF LNA & Mixer (I named it "Finch"), which
amplifies and strips off the 2.4Ghz carrier leaving DTMF information to
pass to the filter/amplifier (named "Osprey"), then to an ADC (named "Robin")
and on to the digital FFT circuitry (named "Lark") which identifies whether
a pre-determined password was superimposed on the original RF signal.

This "cell-operated garage-door opener" test chip is implemented using the
180nm generic cadence design kit (which includes not only standard cells
but I/O cells & pads and dual-port/single-port syncronous/asyncronous
memory compilers) by my team working with associated universities.
Eaglet is meant to be a simple test chip for our university friends.
It's also used in dozens of Cadence product & flow demos & workshops.

The complete design, the design kit, & the front-to-back 100% Cadence
latest tool analog & digital flow documentation (honed by affiliated
university students) is available to university students (by permission)
and faculty at that site. The university help is much appreciated.

Note: All 180nm/130nm/90nm/65nm/etc. Cadence test chips are NOT available
for commercial use without written permission!
--
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