request: sample vcd files for TimingAnalyzer

T

timinganalyzer

Guest
Hi All,

A newly added feature of the TimingAnalyzer is the ability to
read .vcd files. These files can be generated by logic simulators or
tools like Xilinx chipscope, or test equipment like logic analyzers.
So, you can easily make annotated timing diagrams from simulation or
test equipment outputs.

Would it be possible to email any .vcd files samples that you might
have, that are not proprietary, so I can test this feature with .vcd
files from as many sources as possible?

tiiminganalyzer@gmail.com
support@timing-diagrams.com

Thank you in advance,
Dan

www.timing-diagrams.com
 
Does it support verilog1995 VCD? Or Extended VCD format?

-- Amal

On Nov 7, 10:50 am, timinganalyzer <timinganaly...@gmail.com> wrote:
Hi All,

A newly added feature of the TimingAnalyzer is the ability to
read .vcd files.  These files can be generated by logic simulators or
tools like Xilinx chipscope, or test equipment like logic analyzers.
So,  you can easily make annotated timing diagrams from simulation or
test equipment outputs.

Would it be possible to email any .vcd files samples that you might
have,  that are not proprietary,  so I can test this feature with .vcd
files from as many sources as possible?

tiiminganaly...@gmail.com
supp...@timing-diagrams.com

Thank you in advance,
Dan

www.timing-diagrams.com
Click to expand...
 
On Nov 10, 5:24 pm, Amal <akhailt...@gmail.com> wrote:
Does it support verilog1995 VCD?  Or Extended VCD format?

-- Amal

On Nov 7, 10:50 am, timinganalyzer <timinganaly...@gmail.com> wrote:

Hi All,

A newly added feature of the TimingAnalyzer is the ability to
read .vcd files.  These files can be generated by logic simulators or
tools like Xilinx chipscope, or test equipment like logic analyzers.
So,  you can easily make annotated timing diagrams from simulation or
test equipment outputs.

Would it be possible to email any .vcd files samples that you might
have,  that are not proprietary,  so I can test this feature with .vcd
files from as many sources as possible?

tiiminganaly...@gmail.com
supp...@timing-diagrams.com

Thank you in advance,
Dan

www.timing-diagrams.com
Click to expand...
Currently, just the vcd format, but I could add the extended vcd
format if requested.

Do you know what tools work with the extended format? I have also
worked with a compressed file format which might of interest to some
users working with large simulations.

Thanks, Dan
 
"timinganalyzer" <timinganalyzer@gmail.com> wrote in message
news:bf961753-a564-4045-b12b-31d524986f31@a17g2000prm.googlegroups.com...
On Nov 10, 5:24 pm, Amal <akhailt...@gmail.com> wrote:
Does it support verilog1995 VCD? Or Extended VCD format?

-- Amal

On Nov 7, 10:50 am, timinganalyzer <timinganaly...@gmail.com> wrote:

Hi All,

A newly added feature of the TimingAnalyzer is the ability to
read .vcd files. These files can be generated by logic simulators or
tools like Xilinx chipscope, or test equipment like logic analyzers.
So, you can easily make annotated timing diagrams from simulation or
test equipment outputs.

Would it be possible to email any .vcd files samples that you might
have, that are not proprietary, so I can test this feature with .vcd
files from as many sources as possible?

tiiminganaly...@gmail.com
supp...@timing-diagrams.com

Thank you in advance,
Dan

www.timing-diagrams.com

Currently, just the vcd format, but I could add the extended vcd
format if requested.

Do you know what tools work with the extended format?
Click to expand...
Modelsim is one of them.

Hans
www.ht-lab.com

I have also
worked with a compressed file format which might of interest to some
users working with large simulations.

Thanks, Dan
Click to expand...
 
On Nov 11, 3:22 am, "HT-Lab" <han...@ht-lab.com> wrote:
"timinganalyzer" <timinganaly...@gmail.com> wrote in message

news:bf961753-a564-4045-b12b-31d524986f31@a17g2000prm.googlegroups.com...
On Nov 10, 5:24 pm, Amal <akhailt...@gmail.com> wrote:



Does it support verilog1995 VCD? Or Extended VCD format?

-- Amal

On Nov 7, 10:50 am, timinganalyzer <timinganaly...@gmail.com> wrote:

Hi All,

A newly added feature of the TimingAnalyzer is the ability to
read .vcd files. These files can be generated by logic simulators or
tools like Xilinx chipscope, or test equipment like logic analyzers.
So, you can easily make annotated timing diagrams from simulation or
test equipment outputs.

Would it be possible to email any .vcd files samples that you might
have, that are not proprietary, so I can test this feature with .vcd
files from as many sources as possible?

tiiminganaly...@gmail.com
supp...@timing-diagrams.com

Thank you in advance,
Dan

www.timing-diagrams.com

Currently,  just the vcd format,  but I could add the extended vcd
format if requested.

Do you know what tools work with the extended format?

Modelsim is one of them.

Hanswww.ht-lab.com

I have also
worked with a compressed file format which might of interest to some
users working with large simulations.

Thanks,  Dan
Click to expand...
Hi Hans,

Could you send me examples of vcd and evcd files generated by
Modelsim?

Thanks, Dan
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top