request for help using look-up table

i am a final yr BE student wotrking on a project in VLSI.i am using a
look up table in my project which is to be accessed by a paging and
2-level segmentation done simultaneously. but i am unable to generate
the table values and write a verilog code to do this accessing .can any
of you help me with valuable suggestions?
thanking you,
jaisree

 

[Neo]

You can try using system task readmem if you are using verilog-95 or
try using fgetc/fgets or fscanf/scanf if using verilog-2001.

 

[Swapnajit Mittra]

If I understand your question correctly, you have a look-up table
that's made of a number of pages, each page is made of a number of
paragraphs and then each paragraph has a number of entries. And what
you are looking for is a way to access an entry through the page map
scheme, then the paragraph map scheme, and finally through an entry.

If my assumption about your question is correct, try to think of an
addressing scheme for reading from the look-up table that has
page/paragraph/entry information embedded into it. In Verilog parlance,


address = {page address, para address, entry address};

Almost all bus-based addressing schemes in essence use the above
method. Also, for a look up table, your address will be either the
entry which you are indexing or a simple morph of it. Decoding this
address to find out information about the page address, para address
etc. "simultaneously" is the job of a simple decoder.

Now don't tell your advisor that you heard it here!

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