Replacement for XC4005E

[Terry Brown]

We've been using the venerable XC4005E FPGA from Xilinx for many years
now in a bunch of products. However the variant we use has now been
discontinued, and although we can get sufficient quantities to satisfy
our quite low (<100 per year) demand it's time to change some of the
stuff out and redesign where appropriate. Sadly that'll also mean
upgrading our toolchain too, but needs must.

Can anyone suggest something similar, not necessarily from Xilinx? We
don't do anything much with them, just interface to PC104 (ISA) bus and
present a bunch of registers in IO space, or stick some custom low-speed
logic in them, or do address decoding for external chips.

The biggest draw for the 4005 was the 144pin quad flat package which was
easy on our hand assembly process and the user IO count of 110-ish pins
which we need to keep or maybe exceed a bit. Internal logic was always
drawn as circuits using ViewDraw, don't need any fancy HDL stuff here
(and in fact could do without the learning curve anyway). Oh, and also
5V IO would be neat (ISA bus interface) but 3.3V logic also would be
good, because it's getting hard to find a bunch of things in 5V these days.

Any suggestions?

TIA
Terry

 

[Jon Elson]

Terry Brown wrote:

We've been using the venerable XC4005E FPGA from Xilinx for many years
now in a bunch of products. However the variant we use has now been
discontinued, and although we can get sufficient quantities to satisfy
our quite low (<100 per year) demand it's time to change some of the
stuff out and redesign where appropriate. Sadly that'll also mean
upgrading our toolchain too, but needs must.

Can anyone suggest something similar, not necessarily from Xilinx? We
don't do anything much with them, just interface to PC104 (ISA) bus and
present a bunch of registers in IO space, or stick some custom low-speed
logic in them, or do address decoding for external chips.

The biggest draw for the 4005 was the 144pin quad flat package which was
easy on our hand assembly process and the user IO count of 110-ish pins
which we need to keep or maybe exceed a bit. Internal logic was always
drawn as circuits using ViewDraw, don't need any fancy HDL stuff here
(and in fact could do without the learning curve anyway). Oh, and also
5V IO would be neat (ISA bus interface) but 3.3V logic also would be
good, because it's getting hard to find a bunch of things in 5V these
days.
How much logic are you putting in there? There is the XC9500XL series,

all 3.3 V, and the CoolRunner series that needs two voltages.
For more logic, there is the Spartan 3A or 3AN series, VERY affordable,
and you can still have 3.3 V I/O on them. Almost certainly you could
use the smallest, the XC3S50A(N) to replace the 4005.

But, from the sounds of it, the CoolRunner or XC9572XL would cover
the logic needed. For wide address comparators, the CPLD architecture
actually works a lot better, since it is composed of 18-input gates.

Jon

 

On Friday, June 29, 2012 4:23:08 AM UTC+12, Terry Brown wrote:

... IO count of 110-ish pins which we need to keep or maybe exceed a bit.
Oh, and also 5V IO would be neat (ISA bus interface)...

Getting that in a single package will be tough. Is two OK ?
Lattice do 144 pins, but come up short on reaching 110 i/o.

A better sweet spot is 100 pins, which includes Atmel ATF1508ASL/ASVL family, which do native single supply 5V operation.
100 pins also opens more choices from Lattice, and even Cypress PSoC.

For simple IO / decode tasks, then Atmel WinCUPL would work well.
Small and Fast, compiles simple boolean equation entry.

-jg

 

[MK]

On 28/06/2012 17:23, Terry Brown wrote:

We've been using the venerable XC4005E FPGA from Xilinx for many years
now in a bunch of products. However the variant we use has now been
discontinued, and although we can get sufficient quantities to satisfy
our quite low (<100 per year) demand it's time to change some of the
stuff out and redesign where appropriate. Sadly that'll also mean
upgrading our toolchain too, but needs must.

Can anyone suggest something similar, not necessarily from Xilinx? We
don't do anything much with them, just interface to PC104 (ISA) bus and
present a bunch of registers in IO space, or stick some custom low-speed
logic in them, or do address decoding for external chips.

The biggest draw for the 4005 was the 144pin quad flat package which was
easy on our hand assembly process and the user IO count of 110-ish pins
which we need to keep or maybe exceed a bit. Internal logic was always
drawn as circuits using ViewDraw, don't need any fancy HDL stuff here
(and in fact could do without the learning curve anyway). Oh, and also
5V IO would be neat (ISA bus interface) but 3.3V logic also would be
good, because it's getting hard to find a bunch of things in 5V these days.

Any suggestions?

TIA
Terry
If you are going to jump, a decade into the present you should look at

some modern parts which you can expect to go on using for while.
Lattices MachX02 range might do - up to 115 IO in 144 pin package (but
that is the most expensive part - 108 IO is much cheaper).
If you are paying for the parts you might as well get the best out of
them - learn an HDL. (Lattice's toolset is pretty cheap and comes with a
basic version of Aldec HDL which includes a schematic design package
which I find works best used in combination with VHDl or Verilog).

Michael Kellett

 

[Terry Brown]

On 28/06/2012 17:23, Terry Brown wrote:

Can anyone suggest something similar, not necessarily from Xilinx?...

Thanks to all who replied. I'm going to look further into he two Xilinx
CPLDs Jon suggested and the Lattice MachX02 from Michael. The latter is
interesting because it has QFP variants which would be good for now but
also BGA in the same range, and the time is approaching when we are
going to have to think about transitioning to BGA. The Xilinx ones are
probably more useful but may be overkill for current requirements. The
Atmel devices JG suggested are probably a little too small for what we need.

We are small volume, and use ~100 FPGAs a year on hand-assembled boards.
Cost isn't really an issue, board costs are mostly design, assembly
and test anyway, a few $ here or there makes no odds. The biggest
limitation to date is not being able to do BGA, but we're starting to
investigate that now as well, but might have difficulty justifying the
startup cost. However, anything we do do we'd like to continue to do
for the next decade, because although we're low volume we get a lot of
repeats for the same kit over the years, and our customers don't like
changes.

Looks like I'll still have an issue interfacing to the 5V ISA bus on
PC104 stacks though, although the Xilinx devices have some 5V tolerant
inputs, and I guess I can translate the outputs, there aren't that many
apart from the data bus.

Ah decisions, decisions, decisions ...

Thanks for the input,
Terry

 

[Herbert Kleebauer]

On 29.06.2012 14:48, Terry Brown wrote:

We are small volume, and use ~100 FPGAs a year on hand-assembled boards.
Cost isn't really an issue, board costs are mostly design, assembly
and test anyway, a few $ here or there makes no odds. The biggest
limitation to date is not being able to do BGA, but we're starting to

Maybe you should take a look at FPGA modules like

http://enterpoint.co.uk/products/pga-modules/darnaw-1/
http://www.hdl.co.jp/en/index.php/plcc68-series.html

 

[Terry Brown]

On 29/06/2012 14:38, Herbert Kleebauer wrote:

On 29.06.2012 14:48, Terry Brown wrote:

We are small volume, and use ~100 FPGAs a year on hand-assembled boards.
Cost isn't really an issue, board costs are mostly design, assembly
and test anyway, a few $ here or there makes no odds. The biggest
limitation to date is not being able to do BGA, but we're starting to

Maybe you should take a look at FPGA modules like

http://enterpoint.co.uk/products/pga-modules/darnaw-1/
http://www.hdl.co.jp/en/index.php/plcc68-series.html

D'y'know, that's an idea!

I wouldn't want to go for a commercial product of that type before,
though. We've been burned in the past, for example we developed a
number of boards using the Virtex-4 Mini-module from Avnet, which was
fine for 4 years of so until they decided to end-of-life it. If we had
been using the raw Virtex on our own boards, they are still available
and probably will be for years, but because we used the Mini-module
(which has RAM and EEPROM and Ethernet all on a 1"x2" module) we're a
bit stuffed.

However, it would be a fairly trivial task to design a board a bit like
the first one above and have a couple of hundred manufactured
externally, and then use the module on our own bespoke boards.

To be clearer about what we do, we sell maybe 20 or 30 different boards
with a wide variety of specialist functions. No more than 20 of any one
type in a year, and many of them way less than that, and the boards only
form part of the final products. The all use the same FPGA (with
different bespoke programming of course) and a wide variety of external
hardware (DAC, ADC, digital IO). Something like the modules above would
be good. Automated assembly is really not an option because of the low
volumes, which we manage with three techs doing the assembly, and
external assembly wouldn't save any tech salary (because we need all
three anyway) but would just increase costs.

On the other hand, there's probably a good argument for embracing BGA
hand assembly anyway in this day and age, it would open up a bunch of
stuff that's not available in leaded packages, and things are going more
and more that way anyway. Anyone have any experience with it?

Terry

 

[Jon Elson]

Terry Brown wrote:

Automated assembly is really not an option because of the low

volumes, which we manage with three techs doing the assembly, and
external assembly wouldn't save any tech salary (because we need all
three anyway) but would just increase costs.

Well, I'm a TINY manufacturer, just me and occasionally one of my kids

soldering boards, but I have my own pick and place machine. The reflow
soldering is done in a toaster oven with thermocouple controller.
(But, maybe I'm nuts.)

On the other hand, there's probably a good argument for embracing BGA
hand assembly anyway in this day and age, it would open up a bunch of
stuff that's not available in leaded packages, and things are going more
and more that way anyway. Anyone have any experience with it?
Well, the real problem with BGAs is there is no simple way to inspect the

soldering. With QFPs and such, a stereo zoom microscope for several
hundred $ and a ring light is about all you need.

Jon

 

[rickman]

On Jun 29, 8:48 am, Terry Brown <te...@invalid.invalid> wrote:

On 28/06/2012 17:23, Terry Brown wrote:

Can anyone suggest something similar, not necessarily from Xilinx?...

Thanks to all who replied. I'm going to look further into he two Xilinx
CPLDs Jon suggested and the Lattice MachX02 from Michael. The latter is
interesting because it has QFP variants which would be good for now but
also BGA in the same range, and the time is approaching when we are
going to have to think about transitioning to BGA. The Xilinx ones are
probably more useful but may be overkill for current requirements. The
Atmel devices JG suggested are probably a little too small for what we need.

Certainly there are lots of options available, but not may with 5 volt
I/O. Silicon Blue was offering devices that are 5 volt tolerant, but
that is of limited value when doing a PC/104 interface and those parts
have been obsoleted now that they were bought by Lattice.

We are small volume, and use ~100 FPGAs a year on hand-assembled boards.
Cost isn't really an issue, board costs are mostly design, assembly
and test anyway, a few $ here or there makes no odds. The biggest
limitation to date is not being able to do BGA, but we're starting to
investigate that now as well, but might have difficulty justifying the
startup cost. However, anything we do do we'd like to continue to do
for the next decade, because although we're low volume we get a lot of
repeats for the same kit over the years, and our customers don't like
changes.

Not using BGA packages is an issue, but I still prefer to avoid them
because of the requirements they place on the PCB specs. Many BGAs
are very fine pitch, 0.5 mm or even 0.4 mm. This means you need VERY
fine vias to break out the BGA pinout as well as additional layers
driving up the cost of the boards. But then you say your unit costs
are not important so perhaps this is not an issue.

I think BGA are not so hard to hand assemble. Do you use a stencil
for solder paste? Without that you may have a problem. The BGA needs
solder paste which you set the balls on and a heat gun (without too
much air flow) will melt the balls and the paste. I had a contract
assembly house try this once and I think he used a lot more air flow
than needed and he kept pushing the part off the pads. He tried using
glue but then some of the balls didn't get a good connection to the
pads. But then he wasn't using a stencil or solder paste...

If power consumption is important to you, check out the ICE40 line
from Lattice. They do have a few parts in 100 QFPs and 144 QFPs
ranging in size from 640 to 3520 LUTs or 150% to nearly 900% the size
of the XC4005E. Their prices are really good too.

Looks like I'll still have an issue interfacing to the 5V ISA bus on
PC104 stacks though, although the Xilinx devices have some 5V tolerant
inputs, and I guess I can translate the outputs, there aren't that many
apart from the data bus.

I have found switches to be the preferred method of interfacing to 5
volt signals from 3.3 volt FPGAs. 3.3 volt drivers are high enough to
meet the requirement for 5 volt TTL signals and the switch will
prevent the 5 volt signals from damaging the 3.3 volt I/Os. The delay
is very slight < 1ns. A part number for a 10 channel device in a
TSSOP package is SN74CBTD3384CPW. A 20 channel device is
74CBTD16210. There should be smaller packages if you want to use
BGAs.

One final comment. I resisted the switch from schematic to HDL back
in the day. Now I would not touch schematic. The single biggest
reason to use HDL is the vendor independence. It makes it so easy to
switch from one line of devices to another. Learning an HDL is not
really so tough, especially if you don't do software. When I learned
I kept thinking it was like other software and it isn't. It describes
hardware so the code works very differently. If you need help with
that, I think I could be useful to you in getting up the learning
curve. I've helped others before.

Rick

 

[glen herrmannsfeldt]

rickman <gnuarm@gmail.com> wrote:

(snip)

One final comment. I resisted the switch from schematic to HDL back
in the day. Now I would not touch schematic. The single biggest
reason to use HDL is the vendor independence. It makes it so easy to
switch from one line of devices to another. Learning an HDL is not
really so tough, especially if you don't do software. When I learned
I kept thinking it was like other software and it isn't. It describes
hardware so the code works very differently. If you need help with
that, I think I could be useful to you in getting up the learning
curve. I've helped others before.

I agree. For one, I prefer structural verilog and continuous
assignment, which looks less like software.

Also, it helps to have learned about digital logic before, or
not so long after, you start learning software programming
language(s).

Think in terms of wires and gates, then write them down.

It is sometimes nice to have an HDL to schematic conversion
program so that you can look at the drawn schematics, but, to
me, hard to use schematic entry. (I keep having to move wires
around when they run into each other.)

-- glen

 

[jg]

On Saturday, June 30, 2012 12:48:18 AM UTC+12, Terry Brown wrote:

Looks like I'll still have an issue interfacing to the 5V ISA bus on
PC104 stacks though, although the Xilinx devices have some 5V tolerant
inputs, and I guess I can translate the outputs, there aren't that many
apart from the data bus.

You could use two different devices ?
The large IO count tends to bump you up the price curve anyway, so either 2 x 100 pin parts, or 100p + 44p.

Use an 100p/44p Atmel CPLD for the Level shifting/5V IO and a 100p MachXO2 for the engine room stuff that will not fit into a smaller CPLD.

-jg

 

[Nico Coesel]

Jon Elson <jmelson@wustl.edu> wrote:

Terry Brown wrote:

Automated assembly is really not an option because of the low
volumes, which we manage with three techs doing the assembly, and
external assembly wouldn't save any tech salary (because we need all
three anyway) but would just increase costs.


On the other hand, there's probably a good argument for embracing BGA
hand assembly anyway in this day and age, it would open up a bunch of
stuff that's not available in leaded packages, and things are going more
and more that way anyway. Anyone have any experience with it?
Well, the real problem with BGAs is there is no simple way to inspect the
soldering. With QFPs and such, a stereo zoom microscope for several
hundred $ and a ring light is about all you need.

OTOH BGA usually solder well. I have good results with reworking BGAs
using a standard heat gun aka paint stripper.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------

 

[Nico Coesel]

glen herrmannsfeldt <gah@ugcs.caltech.edu> wrote:

rickman <gnuarm@gmail.com> wrote:

(snip)
One final comment. I resisted the switch from schematic to HDL back
in the day. Now I would not touch schematic. The single biggest
reason to use HDL is the vendor independence. It makes it so easy to
switch from one line of devices to another. Learning an HDL is not
really so tough, especially if you don't do software. When I learned
I kept thinking it was like other software and it isn't. It describes
hardware so the code works very differently. If you need help with
that, I think I could be useful to you in getting up the learning
curve. I've helped others before.

I agree. For one, I prefer structural verilog and continuous
assignment, which looks less like software.

Also, it helps to have learned about digital logic before, or
not so long after, you start learning software programming
language(s).

Think in terms of wires and gates, then write them down.

The problem with that method is that you limit yourself to making a
netlist manually. HDLs offer a lot of power which allows you to
describe a large amount of hardware with just a few lines of code.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------